Abstract
The design of spectrum monitoring receiver usually use FPGA (Field Programmable Gate Arrays) + DSP (Digital Signal Processor) hardware model, which requires the baseband data and spectral data under different bandwidths can be real-time transmitted between the FPGA and DSP. According to the characteristics of the receiver, a multi-rate matched universal parallel port (uPP), which is used to transmit data between FPGA and DSP, is implemented in this paper. The port achieves a high-speed data transmission, which is up to 150 MBtye/s with only 20 I/O lines. The adaptation of different input data rates is implemented by a ping-pong buffer in dual-FIFO (First In First Out).
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Huang, D., Li, C., Wang, J., Yuan, S. (2015). A Design of Multi-rate Matched uPP Based on FPGA. In: Mu, J., Liang, Q., Wang, W., Zhang, B., Pi, Y. (eds) The Proceedings of the Third International Conference on Communications, Signal Processing, and Systems. Lecture Notes in Electrical Engineering, vol 322. Springer, Cham. https://doi.org/10.1007/978-3-319-08991-1_94
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DOI: https://doi.org/10.1007/978-3-319-08991-1_94
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-08990-4
Online ISBN: 978-3-319-08991-1
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