3D/TSV-Enabling Technologies

Chapter
Part of the Analog Circuits and Signal Processing book series (ACSP)

Abstract

Three-dimensional (3D) integration is a promising alternative option to traditional two-dimensional (2D) planar chips. The 3D integration is mainly concerned with the communication infrastructure between different stacked dies of future multi-core system-on-chip (SoC) and network-on-chip (NoC). Among several 3D integration technologies, the through silicon via (TSV) approach is the most promising one and therefore is the focus of the majority of 3D integration R&D activities. However, there are challenges that should be overcome before the production of TSV-based 3D integrated circuits (ICs) becomes possible, e.g., electrical modeling challenges, thermal and power challenges, technological challenges, design methodology challenges, and computer-aided design (CAD) tool development challenges. The manufacturability of TSV-based 3D-ICs is an important issue for realizing real 3D-ICs designs.

Keywords

TSV SoC SoP SiP Integration Wire bond Metal bump Modeling Electrical Thermal CAD tools Technological Yield Test Body contact Architectures Power delivery Clock distribution 

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Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  1. 1.Mentor GraphicsHeliopolisEgypt
  2. 2.The American University (New Cairo) and Zewail City of Science and Technology (6th of October City)New CairoEgypt

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