Introduction: Work Around Moore’s Law

Part of the Analog Circuits and Signal Processing book series (ACSP)


Interconnect dimensions and complementary metal–oxide–semiconductor (CMOS) transistor feature sizes approach their physical limits. Therefore, scaling will no longer be the sole contributor to performance improvement. In addition to trying to improve the performance of traditional CMOS circuits, integration of multiple technologies and different components in a high-performance heterogeneous system is a major trend. This chapter briefly surveys key technology level trends, classified as “More Moore” such as: new architectures (silicon on insulator, SOI; FinFET; Twin-Well) and new materials (High-K, metal gate, strained Si), “More than Moore” such as: new interconnect schemes (three-dimensional, 3D; network on chip, NoC; optical; wireless), and “Beyond CMOS” such as: new devices (molecular computer, biological computer, quantum computer).


Moore Scaling More Moore SOI FinFET Twin-well Strained-Si More than Moore 3D NoC Wireless interconnects Beyond CMOS Molecular computer Biological computer Quantum computer 


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© Springer International Publishing Switzerland 2015

Authors and Affiliations

  1. 1.Mentor GraphicsHeliopolisEgypt
  2. 2.The American University (New Cairo) and Zewail City of Science and Technology (6th of October City)New CairoEgypt

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