CSAR Debug Overview
In this chapter we introduce our communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach and its associated infrastructure. This approach and its infrastructure meets the post-silicon debug requirements, identified in Chap. 1, and reduces the effects of the complicating factors for debugging, identified in Chaps. 2 and 3. We first give an introduction of the CSAR debug approach and its on-chip and off-chip debug infrastructure in Sect. 4.1, and show how it is used. In Sect. 4.2, we detail our rationale behind the CSAR debug approach, by describing in detail how this approach addresses the debug requirements and complicating factors for debugging. The CSAR debug approach imposes requirements on the on-chip and off-chip debug infrastructure. We review and formulate these requirements in Sect. 4.3. We conclude this chapter with a summary in Sect. 4.4.
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