Post-silicon Debugging of a Single Building Block

Part of the Embedded Systems book series (EMSY)


In this chapter, we analyze the factors that complicate the post-silicon debugging of a single SOC building block. In Sect. 2.1, we first introduce a formal finite state machine (FSM) description, to capture the cycle-accurate behavior of a single building block. To debug the silicon implementation of the corresponding building block, we can subsequently use the debug process described in Sect.  1.3 to compare its behavior to the behavior that is captured by this description. In doing so, we identify however six factors in Sect. 2.2 that complicate (the application of) this process. We conclude this chapter with a summary in Sect. 2.3.


  1. 1.
    John E. Hopcroft and Jeffrey D. Ullman. Introduction To Automata Theory, Languages, And Computation. Addison-Wesley Publishing Co., 1979.Google Scholar
  2. 2.
    George H. Mealy. A method for synthesizing sequential circuits. Bell Systems Technical Journal, 34:1045–1079, September 1955.Google Scholar
  3. 3.
    Edward F Moore. Gedanken-experiments on sequential machines. 34:129–153, 1956.Google Scholar

Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  1. 1.NXP SemiconductorsEindhovenThe Netherlands
  2. 2.Faculty of Electrical EngineeringEindhoven University of TechnologyEindhovenThe Netherlands

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