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Relocatable Hardware Threads in Run-Time Reconfigurable Systems

  • Alexander Wold
  • Andreas Agne
  • Jim Torresen
Part of the Lecture Notes in Computer Science book series (LNCS, volume 8405)

Abstract

Run-time reconfiguration provides an opportunity to increase performance, reduce cost and improve energy efficiency in FPGA-based systems. However, run-time reconfigurable systems are more complex to implement than static only systems. This increases time to market, and introduces run-time overhead into the system. Our research aims to raise the abstraction level to develop run-time reconfigurable systems. We present operating system extensions which enable seamless integration of run-time reconfigurable hardware threads into applications. To improve resource utilization, the hardware threads are placed on a fine granularity tile grid. We take advantage of a relocatable module placer targeting modern FPGA to manage the reconfigurable area. The module placer accurately models the FPGA resources to compute feasible placement locations for the hardware threads at run-time. Finally, we evaluate our work by means of a case study that consists of a synthetic application to validate the functionality and performance of the implementation. The results show a reduction in reconfiguration time of up to 42% and more than double resource utilization.

Keywords

Application Programming Interface Very Large Scale Integration Module Placer FPGA Resource Improve Resource Utilization 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  • Alexander Wold
    • 1
  • Andreas Agne
    • 2
  • Jim Torresen
    • 1
  1. 1.Department of InformaticsUniversity of OsloNorway
  2. 2.Computer Engineering DepartmentUniversity of PaderbornGermany

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