Finite State Machines with Operational Implementation of Transitions

Abstract

Chapter is devoted to the using the data-path for decreasing the number of LUTs in logic circuits of FPGA-based Moore FSMs. Firstly, the principle of operational implementation of interstate transitions is proposed. It is based on the usage of operational elements (adders, counters, shifters and so on) for calculating codes of the states of transitions. Next, the organization of FSM with operational implementation of interstate transitions is discussed. An example is given for application of the proposed method. Next, the base structure of synthesis process is proposed for Moore FSM with operational implementation of interstate transitions. The structure of the synthesis process depends on initial conditions such as set of operations or codes of FSM states. The typical structures are discussed for the operational automaton executing the transitions. Next, the method is shown based on mixture of traditional and proposed approaches for calculation of the codes of states of transitions. The last part of the chapter discusses the efficiency of proposed solution. The chapter is written together with PhD Roman Babakov (Donetsk National Technical University, Ukraine).