Abstract
The aim of the work described in this chapter is to investigate migration strategies for the execution of parallel genetic algorithms in a Multi-Processor System-on-Chip (MPSoC). Some multimedia and Internet applications for wireless communications are using genetic algorithms and can benefit of the advantages provided by parallel processing on MPSoCs. In order to run such algorithms, we use a Network-on-Chip platform, which provides the interconnection network required for the communication between processors. Two migration strategies are employed, in order to analyze the speedup and efficiency each one can provide, considering the communication costs they require.
This chapter was developed in collaboration with Rubem Euzébio Ferreira.
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References
Ivanov, A., De Micheli, G.: The network-on-chip paradigm in practice and research. IEEE Design and Test of Computers 1(1), 399–403 (2005)
Mello, A.M.: Arquitetura multiprocessada em SoCs: estudo de diferentes topologias de conexão (June 2003) (in Portuguese)
Woszezenki, C.: Alocação de tarefas e comunicação entre tarefas em mpsocs. M.Sc., Faculdade de Informática, PUCRS, Porto Alegre, RS, Brazil (June 2007) (in Portuguese)
Moraes, F., Calazans, N., Mello, A., Möller, L., Ost, L.: Hermes: an infrastructure for low area overhead packet-switching networks on chip. Integration, The VLSI Journal 38(1), 69–93 (2004)
Öberg, J., Jantsch, A., Tenhunen, H.: Special issue on networks on chip. Journal of Systems Architecture 1(1), 61–63 (2004)
Beniniand, L., De Micheli, G.: Networks on chips: a new soc paradigm. IEEE Computer 1(1), 70–78 (2002)
Benini, L., Ye, T.T., De Micheli, G.: Packetized on-chip interconnect communication analysis for MPSoC. In: Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE 2003), pp. 344–349. IEEE Press (2003)
Chiwiacowsky, L.D., de Campos Velho, H.F., Preto, A.J., Stephany, S.: Identifying initial conduction in heat conduction transfer by a genetic algorithm: a parallel approach 28, 180–195 (1980)
Ruiz, P.M., Antonio: Using genetic algorithms to optimize the behavior of adaptive multimedia applications in wireless and mobile scenarios. In: IEEE Wireless Communications and Networking Conference (WCNC 2003), pp. 2064–2068. IEEE Press (2003)
Rhoads, S.: Plasma microprocessor (2009), http://www.opencores.org
Hue, X.: Genetic algorithms for optimization – background and applications. Technical report. Edinburgh Parallel Computer Centre, The University of Edinburgh (1997)
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Nedjah, N., de Macedo Mourelle, L. (2014). Genetic Algorithms on Network-on-Chip. In: Hardware for Soft Computing and Soft Computing for Hardware. Studies in Computational Intelligence, vol 529. Springer, Cham. https://doi.org/10.1007/978-3-319-03110-1_2
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DOI: https://doi.org/10.1007/978-3-319-03110-1_2
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-03109-5
Online ISBN: 978-3-319-03110-1
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