Globally Asynchronous Locally Synchronous Design Based Heterogeneous Multi-core System

Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 248)

Abstract

Multi-core system has wide efficacy in today’s applications due to less power consumption and high performance. According to study of different scalable architectures of heterogeneous multi-core system we have been presented two different cores. First one synchronous or clocked core design is still through far the most accepted digital system design methodology. Synchronous core is well understood and supported by the grown-up CAD tools. Now-a-day it is implemented as System-on-Chips (SoCs). Second one Asynchronous Locally Synchronous (GALS) core is a comparatively latest design methodology of VLSI system that promises to merge the advantages of synchronous and asynchronous designs. By different partitioning strategy of the synchronous architecture it is created. To draw comparisons; a general purpose 8-bit synchronous core was designed and then converted into GALS core. These models were implemented in VHDL with Xilinx ISE 13.3 software and simulated using ModelSim tool. The synthesis results show in the same power consumption and a less area, GALS core outperformed the synchronous core of operating frequency which is just about double the operating frequency than the synchronous version. Globally through the proposed and integrate these cores into a single integrated chip. Generate a multi core system.

Keywords

Asynchronous Synchronous or clocked core GALS core general purpose processor core low power microprocessor SoC 

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Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  1. 1.Electronics Engineering DepartmentG.H. Raisoni College of EngineeringNagpurIndia

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