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Process Model Accuracy Enhancement Using Cluster Based Approach

  • Pardeep Kumar
  • Samit Barai
  • Babji Srinivasan
  • Nihar R. Mohapatra
Part of the Environmental Science and Engineering book series (ESE)

Abstract

Full chip resist simulation is a critical step in the lithography simulation of advanced CMOS technology nodes. The semi-empirical compact models (such as compact model 1, also known as CM1) are generally used in the semiconductor industries for resist simulation since the physical models are computationally expensive. The CM1 model considers physical effects of the resist process and uses a constant threshold on a two dimensional resist surface to extract the critical dimension (CD). However, the required threshold for different samples may vary over a range and therefore a constant threshold value may not hit an optimal solution for all the samples. In this paper, we propose a clustering based approach to enhance the accuracy of CM1 model and resist simulation. In this proposed approach, various attributes of the lithographic samples such as aerial image and pattern density are used to bin the samples into different groups (clusters). The CM1 model is then used to calibrate parameters individually for each group. This approach is verified by doing the resist simulation on one of the layers of 14 nm CMOS technology and the results show good improvement in model accuracy.

Keywords

Compact model Resist model K-means clustering Lithography simulation 

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Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  • Pardeep Kumar
    • 1
  • Samit Barai
    • 2
  • Babji Srinivasan
    • 1
  • Nihar R. Mohapatra
    • 1
  1. 1.Indian Institute of TechnologyChandkheda, AhmedabadIndia
  2. 2.IBM Microelectronics, SRDC—Computational LithographyBangaloreIndia

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