Hot Carrier Reliability Issues of Junctionless Transistor due to Interface Trap Charges for Analog/RF Applications
This paper investigates the analog/RF performance of Junctionless Transistor (JLT) by employing temperature variations, ranging from 200 K to 500 K, along with the influence of interface trap charges. The objective of the present work is to study the performance degradation of junctionless transistor due to interface/fixed trap charges present at the semiconductor/oxide interface of the device at wide temperature ranges. Analog/RF performance distortion in terms of figure of merit (FOM) metrics: intrinsic gain, transconductance, Ion/Ioff ratio, parasitic capacitances, cutoff frequency, current gain, power gain and Gain Transductance Frequency Product (GTFP) has been carried out using ATLAS 3D device simulator. Simulation results reveal that the density of localized charges has strong affects on the device performance and effectively changes the sensitivity of device. It is also analysed that performance degradation is more egregious at low temperature ranges and subthreshold region. This study is beneficial to design and optimization of junctionless device for analog/RF applications.
KeywordsJunctionless (JL) GTFP RFIC ATLAS 3D Figure of Merit (FOM)
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The authors are thankful to CSIR, Govt. of India for providing the financial support to carry out this work. One of the authors (Yogesh Pratap) would like to thank University Grant Commission (UGC) Govt. of India for providing the necessary financial support.
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