Advertisement

Improved Performance of Junctionless Tunnel FETs with Source/Channel Heterostructure

  • Suresh Gundapaneni
  • Aniruddha Konar
  • Mohit Bajaj
  • K. V. R. M. Murali
Part of the Environmental Science and Engineering book series (ESE)

Abstract

We propose a junctionless tunnel FET architecture with a heterostructure at the source/channel interface. We show that the use of a low bandgap material in the source of this device results in significant ON current improvement. We further show that ON current improvement can also be achieved by using a low-k isolation dielectric. The proposed device architecture which combines the merits of both junctionless FETs and Tunnel FETs can be a potential candidate for sub-20 nm technology node.

Keywords

Junctionless transistors Tunnel FETs 

References

  1. 1.
    J.-P. Colinge, C.-W. Lee, A. Afzalian, N. D. Akhavan, R. Yan, I. Ferain,P. Razavi, B. O’Neill, A. Blake, M. White, A.-M. Kelleher, B. McCarthy,and R. Murphy, “Nanowire transistors without junctions,” Nature Nanotechnology, vol. 5, no. 3, pp. 225–229, 2010.CrossRefGoogle Scholar
  2. 2.
    S. Gundapaneni, M. Bajaj, R. K. Pandey, K. V. R. Murali, S. Ganguly, and A. Kottantharayil, “Effect of band-to-band tunneling on junctionless transistors,” IEEE Trans. Electron Devices, vol. 59, no. 4, pp. 1023–1029, Apr. 2012.CrossRefGoogle Scholar
  3. 3.
    S. Gundapaneni, S. Ganguly, and A. Kottantharayil, “Bulk planar junctionless transistor (BPJLT): An attractive device alternative for scaling,”Electron Device Letters, IEEE, vol. 32, no. 3, pp. 261 –263, 2011.CrossRefGoogle Scholar
  4. 4.
    H. G. Virani, A. R. B. Rao, and A. Kottantharayil, “Dual-k spacer device architectures for the improvement of performance of hetero structure n-channel tunnel FETs,” IEEE Transactions on Electron Devices, vol. 57,no. 10, pp. 2410–2417, 2010.CrossRefGoogle Scholar
  5. 5.
    B. Ghosh and M. W. Akram, “Junctionless Tunnel Field Effect Transistor”, Electron Device Letters, IEEE, vol. 34, no. 5, pp. 584 –586, 2013.CrossRefGoogle Scholar

Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  • Suresh Gundapaneni
    • 1
  • Aniruddha Konar
    • 1
  • Mohit Bajaj
    • 1
  • K. V. R. M. Murali
    • 1
  1. 1.Semiconductor Research and Development Center (SRDC)IBM India Pvt. Ltd.BangaloreIndia

Personalised recommendations