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Two Dimensional Model for Threshold Voltage Roll-Off of Short Channel High-k Gate-Stack Double-Gate (DG) MOSFETs

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Abstract

In this paper a two-dimensional (2D) model of threshold voltage roll-off of uniformly doped high-k gate stack double-gate (DG) metal–oxide–semiconductor field-effect transistors (MOSFETs) is presented. The surface potential is obtained by solving the 2D Poisson’s equation using evanescent mode analysis and then it is used to model the threshold voltage roll-off. Threshold voltage roll-off variations against device channel length for different values of gate dielectric constant and silicon film thickness are shown. The modeling results show a good agreement with the numerical simulation data obtained by ATLAS™, a 2D device simulator from SILVACO.

Keywords

  • DG MOSFET
  • High-k
  • Threshold voltage roll-off
  • SCE
  • EOT

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  • DOI: 10.1007/978-3-319-03002-9_48
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Correspondence to Ekta Goel .

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© 2014 Springer International Publishing Switzerland

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Goel, E., Kumar, S., Rawat, G., Kumar, M., Dubey, S., Jit, S. (2014). Two Dimensional Model for Threshold Voltage Roll-Off of Short Channel High-k Gate-Stack Double-Gate (DG) MOSFETs. In: Jain, V., Verma, A. (eds) Physics of Semiconductor Devices. Environmental Science and Engineering(). Springer, Cham. https://doi.org/10.1007/978-3-319-03002-9_48

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