Impact of Silicon Body Thickness on the Performance of Gate-all-around Silicon Nanowire Field Effect Transistor
As the size of the MOSFET is reduced, various short channel effects (SCEs) appears that degrade its performance. Multigate nanowire FET is one of the novel nanoelectronic devices that overcome these MOSFET limitations. The silicon nanowire field effect transistors with multiple gates around the silicon channel can significantly improve the gate control and are considered to be promising candidates for the next generation transistors. In this paper, we have considered the performance limits of Si nanowire field effect transistors in a Gate All Around (GAA) structure. Furthermore, we have studied the effects of Silicon body thickness on the characteristics of GAA silicon nanowire FET. It has been observed that Si-NWFET afford high drive-current (Ion), high transconductance and hence high gain. Thus, GAA configuration has good control of gate, which reduces the short-channel effects to a great extent.
KeywordsNanowire FET Gate-all-around SCE’s and transconductance
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- 1.K. Nakajima, Interface-state density of three dimensional silicon channels measured by charge pumping method, (M.S. Thesis, Tokyo Institute of Technology, 2012)Google Scholar
- 2.R. G. Arms, Engineering Science and Education Journal, 7, 233, (1998).Google Scholar
- 3.S. E. Thompson, IEEE Electron Device Letters, 25, 191, (2004).Google Scholar
- 4.Y. Kim, IEEE International Electron Devices Meeting, 1, 20.2.1, (2001).Google Scholar
- 6.Y. K. Choi, N. Lander, P. Xuans, S. Tang, D. Ha, E. Anderson, T. J. King, J. Bokor and C. Hu, International Electron Device Meeting Technical Digest, 23, 421, (2001).Google Scholar
- 7.N. Singh, “High-Performance fully depleted silicon Nano wire (diameter ≤ 5 nm) gate all around CMOS devices”, IEEE Electronic Devices Letters, 27, pp. 383-386, 2006.Google Scholar
- 8.F. D. Agostino and D.Quercia, “Short- Channel Effects in MOSFETs”, 2000.Google Scholar
- 9.S. P. V. M. Rao, E. V. L. N. Rangacharyulu and K. L. Kishore, “Parameter Optimization of GAA Nanowire FET Using Taguchi Method”, IJTERT, 1, pp. 1-5, 2012.Google Scholar