Data Flow Computation Models

  • Orlando Moreira
  • Henk Corporaal
Chapter
Part of the Embedded Systems book series (EMSY, volume 24)

Abstract

In the previous chapters, we justified our choice for data flow as the basis of a model of computation for embedded real-time streaming applications running on a multiprocessor. There are many flavors of data flow. The ones that are interesting for our stated goals are mostly the variants that exhibit behavior which is independent of data values, because of their analytical properties and the variants with deterministic, data value dependent behavior, because of their expressivity. In this chapter, we present notation for data flow models that we will use throughout the book, and the properties of several data flow computation models that are relevant to our stated goal. This is reference material. It can, for the most, be found elsewhere in the literature [10, 57, 80, 81].

Bibliography

  1. 3.
    F. Baccelli, G. Cohen, G. Olsder, and J.-P. Quadrat. Synchronization and Linearity. John Wiley & Sons, Inc., 1992.MATHGoogle Scholar
  2. 9.
    G. Bilsen et al. Cyclo-static dataflow. IEEE Transactions on Signal Processing, 44(2):397–408, 1996.CrossRefGoogle Scholar
  3. 10.
    J. Buck. Scheduling dynamic dataflow graphs with bounded memory using the token flow model. PhD thesis, Univ. of California, Berkeley, September 1993.Google Scholar
  4. 17.
    A. Dasdan. Experimental analysis of the fastest optimum cycle ratio and mean algorithms. ACM Transactions on Design Automation of Electronic Systems, 9(4):385–418, Oct. 2004.CrossRefGoogle Scholar
  5. 56.
    E. Lee and D. Messerschmitt. Static scheduling of synchronous data flow programs for digital signal processing. In IEEE Transactions on Computers, 1987.Google Scholar
  6. 57.
    E. Lee and D. Messerschmitt. Synchronous data flow. In Proceedings of the IEEE, 1987.Google Scholar
  7. 69.
    T. Miyazaki and E. Lee. Code generation by using integer-controlled data flow graph. In Proc. ICASSP, 1997.Google Scholar
  8. 78.
    P. Poplavko, T. Basten, M. Bekooij, J. van Meerbergen, and B. Mesman. Task-level timing models for guaranteed performance in multiprocessor networks-on-chip. In Proc. Int’l Conf. on Compilers, Architectures and Synthesis for Embedded Systems (CASES), pages 63–72, 2003.Google Scholar
  9. 80.
    R. Reiter. Scheduling parallel computations. Journal of the ACM, 15(4):590–599, October 1968.CrossRefMATHGoogle Scholar
  10. 81.
    S. Sriram and S. Bhattacharyya. Embedded Multiprocessors: Scheduling and Synchronization. Marcel Dekker Inc., 2000.Google Scholar

Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  • Orlando Moreira
    • 1
  • Henk Corporaal
    • 2
  1. 1.EricssonEindhovenThe Netherlands
  2. 2.Faculty of Electrical EngineeringEindhoven University of TechnologyEindhovenThe Netherlands

Personalised recommendations