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Time-to-Failure Models for Selected Failure Mechanisms in Integrated Circuits

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Reliability Physics and Engineering

Abstract

Advanced integrated circuits (ICs) are very complex, both in terms of their design and in their usage of many dissimilar materials (semiconductors, insulators, metals, plastic molding compounds, etc.).

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Notes

  1. 1.

    Moore’s Law, attributed to Gordon Moore, states that the transistor density on ICs tends to double every 18–24 months.

  2. 2.

    Recall from Chap. 4 that a flux divergence represents the net flow of material into or out of a region of interest. A flux divergence can result in the accumulation or depletion of metal ions in the region of interest. Microstructure differences, such as grain size differences, can result in flux divergences.

  3. 3.

    Vacancy is simply a vacant lattice site. A vacancy represents free space (a missing atom) and, as such, a clustering of vacancies can result in void formation. A discussion of vacancies can be found in Chap. 12.

  4. 4.

    Grain boundary (or interface) transport generally dominates for T < 0.5 T melt, where T melt is the melting temperature of the metal (expressed in Kelvin). Bulk (within grain or lattice) transport can dominate for T > 0.5 T melt. The activation energy for grain-boundary transport Q gb is roughly half that of bulk transport Q bulk.

  5. 5.

    Grain sizes are not really as regular/uniform as illustrated in Fig. 3. Grain sizes are generally lognormally distributed.

  6. 6.

    Via is the term used to describe the physical/electrical connection of an upper level of metal to a lower level of metal through a dielectric layer.

  7. 7.

    Up (into via) or down (into via) refers to the electron-flow direction.

  8. 8.

    Drift and diffusion (backflow) mechanisms were discussed in Chap. 6. If the backflow pressure (created by the accumulation of material) starts to cancel the drift-induced pressure, then net material flow ceases.

  9. 9.

    For Al-alloys, stripe widths of approximately 3 µm are typically used for EM testing.

  10. 10.

    It is assumed here that the average of the positive pulses is greater than the average of the negative pulses.

  11. 11.

    Tabs (extra metal extensions) at the cathode-end connection (acting as a reservoir/source of additional metal ions) can slow down the voiding rate and thus can improve the time-to-failure.

  12. 12.

    Jim Black was the first to propose a current density exponent of n = 2 for electromigration in Al-alloys, without barrier layers, where the void nucleation phase tends to dominate the time-to-failure. However, n = 2 is not valid for all metal systems, e.g., n = 1 is used for Cu metallization.

  13. 13.

    The current I, as used here, is a virtual stress (discussed in Sect. 8.4) because TF depends strongly on the dimensions of the contact. The use of a real stress, such as current density J(=I/Area), would normally be preferred. However, due to current crowding effects in the small contact window, the current density is very non-uniform and difficult to describe. For this reason, the virtual stress current I is used.

  14. 14.

    Joule (or self) heating can be an important issue for contacts. Even though the ambient temperature may be held constant, the actual contact temperature can vary greatly with the current level applied. If the self heating is not properly accounted for, then very high apparent n values are obtained.

  15. 15.

    This is normally referred to as plastic (versus elastic) deformation. Elastic deformations tend to produce no damage to the material while plastic deformations tend to cause some amount of permanent change to the material.

  16. 16.

    Generally, metals will tend to flow in order to relieve the stress in the material. Unfortunately, such mass flow can result in notching/voiding in the metal.

  17. 17.

    Grain boundaries which are nearly perpendicular to the metal stripe length.

  18. 18.

    As discussed in Chap. 12, the strain energy reduction/release is greater than the energy increase associated with the creation of new surfaces.

  19. 19.

    The metallization on a chip is constrained (fixed strain) due to the hard dielectrics surrounding the metallization. The creep, in this case, is a stress-relaxation mechanism under fixed strain which can lead to void formation.

  20. 20.

    This equation is usually referred to as the McPherson and Dunn Model for stress migration in interconnects.

  21. 21.

    The prefactor (T 0−T), in Eq. (6), can be expressed in °C or K, since this is a difference of two temperatures. However, the temperature in the exponential term must be expressed in K.

  22. 22.

    The breakdown current is determined by ramping the current to breakdown. If the metal stripe has a notch/void in it, then the breakdown current should be lower.

  23. 23.

    On a chip, there can be several levels of metallization, stacked on top of one another with a layer of dielectric in between metal levels. The via is an electrical connection, through the dielectric layer(s), from an upper metal level to a lower metal level.

  24. 24.

    The voiding is a stress-relief mechanism as discussed in Chap. 12. Void growth occurs because of vacancy flow due to stress gradients. More vacancies are available in wide Cu-leads versus narrow ones.

  25. 25.

    Assembly describes the process used to encapsulate a silicon chip into plastic packaging with electrical connections to the outside world. This process includes: silicon chips are first separated from the wafer (usually by sawing), chips are then attached to a lead frame, the lead frame is then molded in plastic, and finally the leads are trimmed and formed.

  26. 26.

    If Al corrosion occurs in a liquid state, the corrosion may have the appearance of simply missing aluminum. If Al corrosion occurs in humidity/moisture, the corrosion product (usually aluminum hydroxide) can be expansive in size and will appear to be black, under an optical microscope, due to its very rough/cracked texture. The volume of the corrosion product, usually Al(OH)3, can be much larger than the volume of Al consumed.

  27. 27.

    The corrosion cell is discussed in more detail in Chap. 12.

  28. 28.

    The Galvanic Series is discussed in Chap. 12.

  29. 29.

    If the ions cannot diffuse away from the region of oxidation/reduction, then a rise in electrical potential will retard the corrosion potential.

  30. 30.

    Corrosion activity was measured by monitoring the resistance rise vs. time, for a metal stripe when the test structure was stored in an ammonium-chloride solution.

  31. 31.

    100 % relative humidity represents saturated water vapor.

  32. 32.

    This low value of activation energy (0.3 eV) is typical for wet corrosion mechanisms where the mobility of the diffusing ions is good. Due to a very high concentration of phosphorus in the PSG, liquid droplets of phosphoric acid can develop under humid conditions.

  33. 33.

    The phosphorus in the glass is very useful in gettering unwanted sodium ions. The Na ions, if present, can induce a surface-inversion failure mechanism. The surface-inversion failure mechanism is discussed in Sect. 6.

  34. 34.

    Fatigue failure can result from cyclical stresses as discussed in Chap. 12.

  35. 35.

    Coffin-Manson model is discussed in more detail in Chap. 12.

  36. 36.

    The plastic strain range is outside the normal elastic region. Damage is occurring to the material in the plastic range.

  37. 37.

    Additional information on crack propagation can be found in Chap. 12.

  38. 38.

    Poly is short for polycrystalline silicon. Doped-poly has been a common electrode material for MOSFETs for many years. Advanced ICs may use metal gate electrodes.

  39. 39.

    The E-Model was originally introduced as an empirical model and was later given a theoretical thermochemical foundation.

  40. 40.

    For MOS-type capacitors on silicon, when stressing in accumulation: V ox ≌ V applied − 1 V. Whereas, when stressing in inversion: V ox ≌ V applied.

  41. 41.

    The values for η(m, n) can be found in Chap. 12.

  42. 42.

    This range is consistent with effective dipole moments: p eff (9, 2) to p eff (9, 1).

  43. 43.

    Remember that a hole is simply a missing bonding electron. Hole capture thus eliminates one of the two electrons in the S–O bond. Therefore, hole capture serves to weaken the bond. Furthermore, the hole (if hot) can also bring energy to the bond to help in the bond-breakage process.

  44. 44.

    EPROM is an erasable programmable read-only memory.

  45. 45.

    EEPROM is an electrically erasable programmable read-only memory.

  46. 46.

    Flash Memories are block-erasable EEPROMs.

  47. 47.

    Ramped-to-breakdown testing was extensively discussed in Chap. 10. The ramp-to-breakdown test can be a very important test for interconnect dielectric reliability. Both intrinsic issues (low-k integrity) and extrinsic issues (metal/dielectric defects) can be found in a ramp-to-breakdown test at elevated temperature.

  48. 48.

    Lucky electron means that it obtains the maximum possible kinetic energy.

  49. 49.

    These energetic electrons are referred to as hot, because their kinetic energy is greater than the average thermal energy (3/2)K B T.

  50. 50.

    Normally, each Si–O bond has two electrons in it which are being shared. If the bond is broken (thus forming a dangling bond), depending on the chemical potential (Fermi-level), a dangling bond can be neutral (retains a single electron), can become negative with the trapping of a second electron, or can give up its single electron (hole trap) and become positively charged.

  51. 51.

    The gate voltage (V gs) conditions must be determined that produce the maximum substrate current, for a fixed drain-to-source voltage V ds. For an n-type MOSFET, this could be V gs = (1/2) V ds for n-type MOSFETs with longer channel lengths (>0.25 μm) but could be V gs = V ds for devices with shorter channel lengths. In any case, the voltage conditions which produce the maximum substrate current must be established for the full range of expected device operation.

  52. 52.

    It is also possible that some of the H+ ions may be reduced and dispersed within the poly-gate electrode and/or diffuse laterally from the gate region.

  53. 53.

    Note that for the case m = 0.25, the time-to-failure kinetics are four times greater than the degradation kinetics!

Bibliography

Corrosion

  • Dunn, C. and J. McPherson: Recent Observations on VLSI Bond Pad Corrosion Kinetics, J. Electrochem. Soc., 661 (1988).

    Google Scholar 

  • Flood, J.: Reliability Aspects of Plastic Encapsulated Integrated Circuits, IEEE International Reliability Physics Symposium Proceedings, 95 (1972).

    Google Scholar 

  • Gunn, J., R. Camenga and S. Malik: Rapid Assessment of the Humidity Dependence of IC Failure Modes by Use of Hast, IEEE International Reliability Physics Symposium Proceedings, 66 (1983).

    Google Scholar 

  • Koelmans, H.: Metallization Corrosion in Silicon Devices by Moisture-Induced Electrolysis, IEEE International Reliability Physics Symposium Proceedings, 168 (1974).

    Google Scholar 

  • Lawrence, D.. and J. McPherson: Corrosion Susceptibility of Al-Cu and Al-Cu-Si Films, J. Electrochem. Soc., Vol. 137, 3879 (1990).

    Google Scholar 

  • McPherson, J.: VLSI Corrosion Models: A Comparison of Acceleration Factors, Proceedings of Third Intern. Symp. on Corrosion and Reliability of Electronic Materials and Devices, Electrochem. Soc., Vol. 94–29, 270 (1994).

    Google Scholar 

  • Paulson, W. and R. Kirk: The Effects of Phosphorus-Doped Passivation Glass on the Corrosion of Aluminum, IEEE International Reliability Physics Symposium Proceedings, 172 (1972).

    Google Scholar 

  • Peck, D.: The Design and Evaluation of Reliable Plastic-Encapsulated Semiconductor Devices, IEEE International Reliability Physics Symposium Proceedings, 81 (1970).

    Google Scholar 

  • Peck, D.: A Comprehensive Model for Humidity Testing Correlation, IEEE International Reliability Physics Symposium Proceedings, 44 (1986).

    Google Scholar 

  • Schnable, A. and R. Keen: Failure Mechanisms in Large-Scale Integrated Circuits, IEEE International Reliability Physics Symposium Proceedings, 170 (1969).

    Google Scholar 

Electromigration (EM)

  • Black, J.: A Brief Survey of Some Recent Electromigration Results, IEEE Trans. Electron Dev., ED-16, 338 (1969).

    Google Scholar 

  • Blech, I. and H. Sello: The Failure of Thin Aluminum Current-Carrying Strips on Oxidized Silicon, Physics of Failures in Electronics Vol. 5, USAF-RADC Series, 496 (1966).

    Google Scholar 

  • d-Heurle, F. and P. Ho, Electromigration in Thin Films. In: Thin Films: Interdiffusion and Reactions, John Wiley & Sons, 243 (1978).

    Google Scholar 

  • Filippi, R., G. Biery and R. Wachnik: The Electromigration Short-Length Effect in Ti-AlCu-Ti Metallization with Tungsten Plugs, J. Appl. Phys., Vol. 78, 3756 (1995).

    Google Scholar 

  • Graas, C., H. Le, J. McPherson and R. Havemann, Electromigration Reliability Improvements of W-Plug vias by Titanium Layering, IEEE International Reliability Physics Symposium Proceedings, 173 (1994).

    Google Scholar 

  • Hau-Riege, S.: Probabilistic Immortality of Cu Damascene Interconnects, Journal of Applied Physics, 91(4), 2014 (2002).

    Google Scholar 

  • Hau-Riege, C. A. P. Marathe, and V. Pham: The Effect of Low-k ILD on the Electromigration Reliability of Cu Interconnects with Different Line Lengths, 41st Annual IEEE International Reliability Physics Symposium Proceedings (IRPS), 173 (2003).

    Google Scholar 

  • Hu, C. et al.: Scaling Effect on Electromigration in On-Chip Cu Wiring, IEEE International Interconnect Conference, 267 (1999).

    Google Scholar 

  • Hu, C., et al.: Effects of Overlayers on Electromigration Reliability Improvement for Cu/Low K Interconnects, 42th Annual IEEE International Reliability Physics Symposium Proceedings (IRPS), 222 (2004).

    Google Scholar 

  • Huntington, H. and A. Grone: Current Induced Marker Motion in Gold Wires, J. Phys. Chem. Solids, VOL. 20, 76 (1961).

    Google Scholar 

  • Hussein, M. and J. He: Materials Impact on Interconnect Process Technology and Reliability, IEEE Transactions on Semiconductor Manufacturing, 18(01), 69 (2005).

    Google Scholar 

  • Lane, M., E. Liniger, and J. R. Lloyd: Relationship between interfacial adhesion and electromigration in Cu metallization, J. Appl. Phys., 93(3), 1417 (2003).

    Google Scholar 

  • Lee, K., X. Lu, E. T. Ogawa, H. Matsuhashi, and P. S. Ho: Electromigration Study of Cu/low k Dual-damascene Interconnects, 40th Annual IEEE International Reliability Physics Symposium Proceedings (IRPS), 322 (2002).

    Google Scholar 

  • Lloyd, J.: Electromigration in Thin Film Conductors, Semicond. Sci. Technol. 12, 1177 (1997).

    Google Scholar 

  • Maiz, J.: Characterization of Electromigration under Bidirectional and Pulsed Unidirectional Currents, IEEE International Reliability Physics Symposium Proceedings, 220 (1989).

    Google Scholar 

  • Martin, C. and J. McPherson: Via Electromigration Performance of Ti/W/Al-Cu(2%) Multilayered Metallization, VLSI Multilevel Interconnect Conference Proceedings, 168 (1989).

    Google Scholar 

  • McPherson, J., H. Le and C. Graas: Reliability Challenges for Deep Submicron Interconnects, Microelectronics Reliability, Vol. 37, 1469 (1997).

    Google Scholar 

  • Michael, N., C. Kim, P. Gillespie, and R. Augur: Mechanism of Reliability Failure in Cu Interconnects with Ultra-Low Materials, Applied Physics Letters, 83(10), 1959 (2003).

    Google Scholar 

  • Oates, A.: Electromigration Failure Distribution of Contacts and Vias as a Function of Stress Conditions in Submicron IC Metallizations, IEEE International Reliability Physics Symposium Proceedings, 164 (1996).

    Google Scholar 

  • Ogawa, E., et al.: Statistics of Electromigration Early Failures in Cu/Oxide Dual-Damascene Interconnects, 39th Annual IEEE International Reliability Physics Symposium Proceedings (IRPS), 341(2001).

    Google Scholar 

  • Ogawa, E., K.-D. Lee, V. A. Blaschke, and P. S. Ho: Electromigration Reliability Issues in Dual-Damascene Cu Interconnections, IEEE Transactions on Reliability, 51(4), 403 (2002).

    Google Scholar 

  • Ondrusek, J., C. Dunn and J. McPherson: Kinetics of Contact Wearout for Silicided(TiSi2) and Nonsilicided Contacts, IEEE International Reliability Physics Symposium Proceedings, 154 (1987).

    Google Scholar 

  • Park, Y. Park, K.-D. Lee and W. R. Hunter, 43th Annual IEEE International Reliability Physics Symposium Proceedings (IRPS), 18 (2005).

    Google Scholar 

  • Shatzkes, M. and J. R. Lloyd: A Model for Conductor Failure Considering Concurrently with Electromigration Resulting in a Current Exponent of 2, J. Appl. Physics, Vol. 59, 3890 (1986).

    Google Scholar 

  • Steenwyk, S. and E. Kankowski: Electromigration in Aluminum to Ta-Silicide Contacts, IEEE International Reliability Physics Symposium Proceedings, 30 (1986).

    Google Scholar 

  • Ting, L., J. May, W. Hunter and J. McPherson: AC Electromigration Characterization and Modeling of Multilayered Interconnects, IEEE International Reliability Physics Symposium Proceedings, 311 (1993).

    Google Scholar 

  • Vaidya, S. et al.: Electromigration Induced Shallow Junction Leakage with Al/Poly-Si Metallization, J. Electrochem. Soc., Vol. 130, 496 (1983).

    Google Scholar 

  • Vaidya, S., et al.: Shallow Junction Cobalt Silicide Contacts with Enhanced Electromigration Resistance, J. Appl. Phys. Vol. 55, 3514 (1984).

    Google Scholar 

Hot Carrier Injection (HCI)

  • Aur, S., A. Chatterjee and T. Polgreen: Hot Electron Reliability and ESD Latent Damage, IEEE International Reliability Physics Symposium Proceedings, 15 (1988).

    Google Scholar 

  • Fang, P., J.T. Yue, and D. Wollesen: A Method to Project Hot-Carrier Induced Punch Through Voltage Reduction for Deep Submicron LDD PMOS FETs at Room and Elevated Temperatures, IEEE International Reliability Physics Symposium Proceedings, 131 (1982).

    Google Scholar 

  • LaRosa, G., et al.: NBTI Channel Hot Carrier Efffects in PMOSFETS in Advanced CMOS Technologies, IEEE International Reliability Physics Symposium Proceedings, 282 (1997).

    Google Scholar 

  • Liu, Z., et al.: Design Tools for Reliability Analysis, IEEE Design Tools for Reliability Analysis, IEEE Design Automation Conference, pp. 182–185, (2006).

    Google Scholar 

  • Lu, M., et al.: Hot Carrier Degradation in Novel Strained Si n-MOSFETs, IEEE International Reliability Physics Symposium Proceedings, pp. 18–21, (2004).

    Google Scholar 

  • Ong, T., P. Ko and C. Hu: Hot-Carrier Current Modeling and Device Degradation in Surface Channel PMOSFET, IEEE Trans. on Electron Devices, ED-37, 1658 (1990).

    Google Scholar 

  • Snyder, E., D. Cambell, S. Swanson and D. Pierce: Novel Self-Stressing Test Structures for Realistic High-Frequency Reliability Characterization, IEEE International Reliability Physics Symposium Proceedings, 57 (1993).

    Google Scholar 

  • Takeda, E., R. Izawa, K. Umeda and R. Nagai: AC Hot-Carrier Effects in Scaled MOS Devices, IEEE International Reliability Physics Symposium Proceedings, 118 (1991).

    Google Scholar 

  • Wang, W., et al.: An Integrated Modeling Paradigm of Circuit Reliability for 65 nm CMOS Technology, IEEE Custom Integrated Circuits Conference, pp. 511–514 (2007).

    Google Scholar 

  • Wang-Ratkovic, J. et al.: New Understanding of LDD CMOS Hot-Carrier Degradation and Device Lifetime at Cryogenic Temperatures, IEEE International Reliability Physics Symposium Proceedings, 312 (1997).

    Google Scholar 

  • Yue J.: Reliability. In: ULSI Technology, McGraw-Hill, 657 (1996).

    Google Scholar 

Mobile-Ions/Surface-Inversion

  • Hefley, P. and J. McPherson: The Impact of an External Sodium diffusion Source on the Reliability of MOS Circuitry, IEEE International Reliability Physics Symposium Proceedings, 167 (1988).

    Google Scholar 

  • Schnable, A.: Failure Mechanisms in Microelectronic Devices, Microelectronics and Reliability, (1988).

    Google Scholar 

  • Snow, E., A.S. Grove, B.E. Deal, and C.T. Sah: Ion Transport Phenomenon in Insulating Films, J. Appl. Phys. Vol 36, 1664 (1965).

    Google Scholar 

  • Snow, E. and B.E. Deal: Polarization Phenomena and Other Properties of Phosphosilicate Glass Films on Silicon, J. Electrochem. Soc., Vol 113, 263 (1966).

    Google Scholar 

  • Stuart, D.: Calculations of Activation Energy of Ionic Conductivity in Silica Glass by Classical Methods, Journal of the American Ceramic Society, 573 (1954).

    Google Scholar 

Negative-Bias Temperature Instability (NBTI)

  • Abadeer, W. and W. Ells: Behavior of NBTI Under AC Dynamical Circuit Conditions, IEEE International Reliability Physics Symp., pp. 17–22, (2003).

    Google Scholar 

  • Alam, A., et. al.: A Comprehensive Model of PMOS Negative Bias Temperature Degradation, Microelectronics Reliability, pp. 71–81 (2005).

    Google Scholar 

  • Chakravarthi, S. et al.: A Comprehensive Framework for Predictive Modeling of Negative Bias Temperature Instability, IEEE International Reliability Physics Symp. pp. 273–282, (2004).

    Google Scholar 

  • Chen, G., et al.: Dynamic NBTI of PMOS Transistors and Its Impact on Device Lifetime, IEEE International Reliability Physics Symp. pp. 196–202, (2003).

    Google Scholar 

  • Huard V. and M. Denais: Hole Trapping Effect on Methodology for DC and AC Negative Bias Temperature Instability Measurements in pMOS transistors, IEEE International Reliability Physics Symp. pp. 40–45 (2003).

    Google Scholar 

  • Kimizuka, N., et al.,: The Impact of Bias Temperature Instability for Direct-Tunneling in Ultra-thin Gate Oxide on MOSFET Scaling, VLSI Symp. On Tech., pp. 73–74, (1999).

    Google Scholar 

  • Krishnan, A., et al.: NBTI Impact on Transistor and Circuit: Models, Mechanisms and Scaling Effects, IEEE-IEDM, pp. 349–352, (2003).

    Google Scholar 

  • Larosa, G., et al.,: NBTI-Channel Hot Carrier Effects in Advanced Sub-Micron PFET Technologies, IEEE Interational Reliability Physics Symp. Proceedings, pp. 282–286 (1997).

    Google Scholar 

  • Mahaptra, S., et. al.: Negative bias Temperature Instability in CMOS Devices, Microelectronics Reliability, pp. 114–121 (2005).

    Google Scholar 

  • Ogawa, S. and N. Shiono: Generalized Diffusion–reaction Model for the Low-Field Chaarge Buildup Instability at the Si-SiO2 Interface, Physical Rev. B, p. 4218 (1995).

    Google Scholar 

  • Rangan, S., et al.: Universal Recovery Behavior of Negative Bias Temperature Instability, IEEE-IEDM, pp. 341–344.(2003).

    Google Scholar 

  • Reddy, V., et al.: Impact of Negative Bias Temperature Instability on Digital Circuit Reliability, pp. 248–254, (2002).

    Google Scholar 

  • Schlunder, C. et al.: Evaluation of MOSFET Reliability in Analog Applications, IEEE, International Reliability Physics Symposium, pp. 5–10, (2003).

    Google Scholar 

  • Stathis, J. and S. Zafar: The Negative Bias Temperature Instability of MOS Devices: A Review, Microelectronics Reliability, pp. 270–286 (2006).

    Google Scholar 

Stress Migration/Stress-Induced Voiding

  • Edelstein, D., et al.: Full Copper Wiring in a Sub-0.25 μm CMOS ULSI Technology, IEEE International Electron Devices Meeting Technical Digest, 773 (1997).

    Google Scholar 

  • Groothuis, S. and W. Schroen: Stress Related Failures Causing Open Metallization, IEEE International Reliability Physics Symposium Proceedings, 1 (1987).

    Google Scholar 

  • Harper, J., et al.: Mechanisms for Microstructure Evolution in Electroplated Copper Thin Films Near Room Temperature, Journal of Applied Physics, 86(5), 2516 (1999).

    Google Scholar 

  • Klema, J., R. Pyle and E. Domangue: Reliability Implications of Nitrogen Contaminated during Deposition of Sputtered Aluminum/Silicon Metal Films, IEEE International Reliability Physics Symposium Proceedings, 1 (1984).

    Google Scholar 

  • McPherson, J. and C. Dunn: A Model for Stress-Induced Metal Notching and Voiding in VLSI Al-Si Metallization, J. Vac. Sci. Technology B, 1321 (1987).

    Google Scholar 

  • McPherson, J.: Accelerated Testing. In: Electronic Materials Handbook, Volume 1 Packaging, ASM International Publishing, 887 (1989).

    Google Scholar 

  • Ogawa, E., J. W. McPherson, J. A. Rosal, K. J. Dickerson, T. – C. Chiu, L. Y. Tsung, M. K. Jain, T. D. Bonifield, J. C. Ondrusek, and W. R. McKee: Stress-Induced Voiding Under Vias Connected To Wide Cu Metal Leads, 40th Annual IEEE International Reliability Physics Symposium Proceedings (IRPS), 312 (2002).

    Google Scholar 

  • Paik, J., J.-K. Jung and Y.-C. Joo: The Dielectric Material Dependence of Stress and Stress Relaxation on the Mechanism of Stress-Voiding of Cu Interconnects, 43th Annual IEEE International Reliability Physics Symposium Proceedings (IRPS), 195 (2005).

    Google Scholar 

  • Von Glasow, A., A. H. Fischer, M. Hierlemann, S. Penka, and F. Ungar: Geometrical Aspects of Stress-Induced Voiding in Copper Interconnects, Advanced Metallization Conference Proceedings (AMC), 161 (2002).

    Google Scholar 

  • Yoshida, K., T. Fujimaki, K. Miyamoto, T. Honma, H. Kaneko, H. Nakazawa, and M. Morita: Stress-Induced Voiding Phenomena for an actual CMOS LSI Interconnects, IEEE International Electron Devices Meeting Technical Digest, 753 (2002).

    Google Scholar 

  • Yue, J., W. Fusten and R. Taylor: Stress Induced Voids in Aluminum Interconnects During IC Processing, IEEE International Reliability Physics Symposium Proceedings, 126 (1985).

    Google Scholar 

  • Yue, J.: Reliability. In: ULSI Technology, McGraw-Hill, 674 (1996).

    Google Scholar 

Temperature-Cycling/Fatigue

  • Blish, R.: Temperature Cycling and Thermal Shock Failure Rate Modeling, IEEE International Reliability Physics Symposium Proceedings, 110 (1997).

    Google Scholar 

  • Caruso, H. and A. Dasgupta: A Fundamental Overview of Accelerated-Testing Analytical Models, Proceedings of Annual Rel. and Maintainability Symposium, 389 (1998).

    Google Scholar 

  • Coffin, L., Met. Eng. Q., Vol 3, 15 (1963).

    Google Scholar 

  • Dieter, G.: Mechanical Metallurgy, McGraw-Hill, 467 (1976).

    Google Scholar 

  • Dunn, C. and J. McPherson: Temperature Cycling Acceleration Factors in VLSI Applications, IEEE International Reliability Physics Symposium Proceedings, 252 (1990).

    Google Scholar 

  • Manson, S.: Thermal Stress and Low-Cycle Fatigue, McGraw-Hill Book Co., New York, (1966).

    Google Scholar 

Time-Dependent Dielectric Breakdown (TDDB)

  • Anolick, E. and G. Nelson: Low-Field Time-Dependent Dielectric Integrity, IEEE International Reliability Physics Symposium Proceedings, 8 (1979).

    Google Scholar 

  • Berman, A.: Time Zero Dielectric Reliability Test by a Ramp Method, IEEE International Reliability Physics Symposium Proceedings, 204 (1981).

    Google Scholar 

  • Boyko, K. and D. Gerlach: Time Dependent Dielectric Breakdown of 210A Oxides, IEEE International Reliability Physics Symposium Proceedings, 1 (1989).

    Google Scholar 

  • Charparala, P., et al.: Electric Field Dependent Dielectric Breakdown of Intrinsic SiO2 Films Under Dynamic Stress, IEEE International Reliability Physics Symposium Proceedings, 61 (1996).

    Google Scholar 

  • Chen, I., S. Holland and C. Hu: A Quantitative Physical Model for Time-dependent Breakdown, IEEE International Reliability Physics Symposium Proceedings, 24 (1985).

    Google Scholar 

  • Cheung, K.: A Physics-Based, Unified Gate-Oxide Breakdown Model, Technical Digest of Papers International Electron Devices Meeting, 719 (1999).

    Google Scholar 

  • Crook, D.: Method of Determining Reliability Screens for Time-Dependent Dielectric Breakdown, IEEE International Reliability Physics Symposium Proceedings, 1 (1979).

    Google Scholar 

  • Degraeve, R., et al.: New Insights in the Relation Between Electron Trap Generation and the Statistical Properties of Oxide Breakdown, IEEE Trans. Electron Devices 45, 904 (1998).

    Google Scholar 

  • DiMaria, D. and J. Stasiak: Trap Creation in Silicon Dioxide Produced by hot electrons, J. Appl. Physics, Vol 65, 2342 (1989).

    Google Scholar 

  • DiMaria, D., E. Cartier and D. Arnold: Impact ionization, trap creation, degradation, and breakdown in silicon dioxide films on silicon, J. Appl. Physics, Vol 73, 3367 (1993).

    Google Scholar 

  • Eissa, M., D. A. Ramappa, E. Ogawa, N. Doke, E. M. Zielinski, C. L. Borst, G. Shinn, and A. J.McKerrow: Post-Copper CMP Cleans Challenges for 90 nm Technology, Advanced Metallization Conference Proceedings (AMC), 559 (2004).

    Google Scholar 

  • Hu, C. and Q. Lu: A Unified Gate Oxide Reliability Model, IEEE International Reliability Physics Symposium Proceedings, 47 (1999).

    Google Scholar 

  • Haase, G., E. T. Ogawa and J. W. McPherson: Breakdown Characteristics of Interconnect Dielectrics, 43th Annual IEEE International Reliability Physics Symposium Proceedings (IRPS), 466 (2005).

    Google Scholar 

  • Kimura, M.: Oxide Breakdown Mechanism and Quantum Physical Chemistry for Time-Dependent Dielectric Breakdown, IEEE International Reliability Physics Symposium Proceedings, 190 (1997).

    Google Scholar 

  • Lee, J., I. Chen and C. Hu: Statistical Modeling of Silicon Dioxide Reliability, IEEE International Reliability Physics Symposium Proceedings, 131 (1988).

    Google Scholar 

  • McPherson, J. and D. Baglee: Acceleration factors for Thin Gate Oxide Stressing, IEEE International Reliability Physics Symposium Proceedings, 1 (1985).

    Google Scholar 

  • McPherson, J. and H. Mogul: Underlying Physics of the Thermochemical E-Model in Describing Low-Field Time-Dependent Dielectric Breakdown in SiO2 Thin Films, J. Appl. Phys., Vol. 84, 1513 (1998).

    Google Scholar 

  • McPherson, J., R. Khamankar and A. Shanware: Complementary Model for Intrinsic Time- Dependent Dielectric Breakdown in SiO2 Dielectrics, J. Appl. Physics, Vol. 88, 5351 (2000).

    Google Scholar 

  • McPherson, J.: Trends in the Ultimate Breakdown Strength of High Dielectric-Constant Materials, IEEE Trans. On Elect. Devs., Vol. 50, 1771 (2003).

    Google Scholar 

  • McPherson, J.: Determination of the Nature of Molecular bonding in Silica from Time-Dependent Dielectric Breakdown Data, J. Appl. Physics, Vol. 95, 8101 (2004).

    Google Scholar 

  • Moazzami, R., J. Lee and C. Hu: Temperature Acceleration of Time-Dependent Dielectric Breakdown, IEEE Trans. Elect. Devices, Vol. 36, 2462 (1989).

    Google Scholar 

  • Nicollian, P.: Experimental Evidence for Voltage Driven Breakdown Models in Ultra-Thin Gate Oxides, IEEE International Reliability Physics Symposium, 47 (1999).

    Google Scholar 

  • Noguchi, J., N. Miura, M. Kubo, T. Tamaru, H. Yamaguchi, N. Hamada, K. Makabe, R. Tsuneda and K. Takeda: Cu-Ion-Migration Phenomena and its Influence on TDDB Lifetime in Cu Metallization, 41st Annual IEEE International Reliability Physics Symposium Proceedings (IRPS), 287 (2003).

    Google Scholar 

  • Ogawa, E., J. Kim and J. McPherson: Leakage, Breakdown, and TDDB Characteristics of Porous Low-k Silica-Based Interconnect Dielectrics, IEEE-IRPS Proceedings, 166 (2003).

    Google Scholar 

  • Ogawa, E., J. Kim, G. S. Haase, H. C. Mogul, and J. W. McPherson: Leakage, Breakdown, and TDDB Characteristics of Porous Low-K Silica-Based Interconnect Dielectrics, 41st Annual IEEE International Reliability Physics Symposium Proceedings (IRPS), 166 (2003).

    Google Scholar 

  • Pompl, T., et al.: Change in Acceleration Behavior of Time-Dependent Dielectric Breakdown by the BEOL Process: Indications for Hydrogen Induced Transition in Dominant Degradation Mechanism, IEEE International Reliability Physics Symposium, 388 (2005).

    Google Scholar 

  • Schuegraph, K. and C. Hu: Hole Injection Oxide Breakdown Model for Very Low Voltage Lifetime Extrapolations, IEEE International Reliability Physics Symposium Proceedings, 7 (1993).

    Google Scholar 

  • Suehle, J., et. al.: Field and Temperature Acceleration of Time-Dependent Dielectric Breakdown in Intrinsic Thin SiO2, IEEE International Reliability Physics Symposium Proceedings, 120 (1994).

    Google Scholar 

  • Suehle, J. and P. Chaparala: Low Electric Field Breakdown of Thin SiO2 Films Under Static and Dynamic Stress, IEEE Trans. Elect. Devices, 801 (1997).

    Google Scholar 

  • Sune, J., D. Jimenez, and E. Miranda: Breakdown Modes and Breakdown Statistics of Ultrathin SiO2 Gate Oxides, J. High Speed Electronics and Systems, 11, 789 (2001).

    Google Scholar 

  • Stathis, J and D. DiMaria: Reliability Projection for Ultra-Thin Oxides at Low Voltage, Technical Digest of Papers International Electron Devices Meeting, 167 (1998).

    Google Scholar 

  • Swartz, G.: Gate Oxide Integrity of NMOS Transistor Arrays, IEEE Trans. on Electron Devices, Vol. ED-33, 1826 (1986).

    Google Scholar 

  • Tsu, R., J. W. McPherson, and W. R. McKee: Leakage and Breakdown Reliability Issues Associated with Low-k Dielectrics in a Dual-Damascene Cu Process, 38th Annual IEEE International Reliability Physics Symposium Proceedings (IRPS), 348 (2000).

    Google Scholar 

  • Wu, E. et. al.: Experimental Evidence of TBD Power-Law for Voltage Dependence of Oxide Breakdown in Ultrathin Gate Oxides, IEEE Trans. On Electron Devices, Vol. 49, 2244 (2002).

    Google Scholar 

  • Wu, E., et. al.: Polarity-Dependent Oxide Breakdown of NFET Devices for Ultra-Thin Gate Oxide, IEEE International Reliability Physics Symposium, 60 (2002).

    Google Scholar 

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McPherson, J.W. (2013). Time-to-Failure Models for Selected Failure Mechanisms in Integrated Circuits. In: Reliability Physics and Engineering. Springer, Heidelberg. https://doi.org/10.1007/978-3-319-00122-7_11

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