Source-to-drain tunneling is investigated for Si triple-gate nanowire transistors. The full-band quantum transport problem is solved in an atomistic basis using the nearestneighbor sp
s* tight-binding method. It is self-consistently coupled to the threedimensional calculation of the electrostatic potential in the device using the finite element method. This procedure is applied to the computation of I
d — V
gs transfer characteristics of transistors with different channel orientations such as , , , and  for gate lengths ranging from 4 nm to 13 nm. The subthreshold swing S is then extracted from the results to determine the scaling limit of nanowire transistors.