Abstract
The emergence of deep learning has revolutionized side-channel attacks, making them a serious threat to cryptographic systems. Clock randomization is a well-established mitigation technique against side-channel attacks that, when combined with duplication, has been shown to effectively protect FPGA implementations of block ciphers and post-quantum KEMs. In this paper, we present two deep-learning-based side-channel attacks on an FPGA implementation of AES protected with the clock randomization and duplication countermeasure. The attacks are based on identifying sporadic synchronicity in the execution of the encryption rounds of the two AES cores. We remedy this vulnerability by presenting three modular additions to the original design of the countermeasure that restores its security and increases its robustness.
M. Brisfors and M. Moraitis—Both authors contributed equally to this manuscript.
This work was supported in part by the Swedish Civil Contingencies Agency (Grant No. 2020-11632) and the Sweden’s Innovation Agency Vinnova (Grant No. 2023-00221).
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Notes
- 1.
This acronym is not used in the original paper that describes the countermeasure. We decided to introduce it here since we make many references to it throughout the paper.
- 2.
Hamming Weight is defined as the number of logical 1 s in the binary representation of the value.
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Brisfors, M., Moraitis, M., Landin, G.K., Jilborg, T. (2024). Attacking and Securing the Clock Randomization and Duplication Side-Channel Attack Countermeasure. In: Mosbah, M., Sèdes, F., Tawbi, N., Ahmed, T., Boulahia-Cuppens, N., Garcia-Alfaro, J. (eds) Foundations and Practice of Security. FPS 2023. Lecture Notes in Computer Science, vol 14551. Springer, Cham. https://doi.org/10.1007/978-3-031-57537-2_23
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