Skip to main content

Part of the book series: Springer Theses ((Springer Theses))

  • 38 Accesses

Abstract

Based on our conceptional contributions on host bypassing, Internet service creation on programmable hardware, and active queue management in programmable hardware, we will show the viability of these approaches in the following. Further, we will investigate the properties of the prior introduced approaches in detail. The evaluation of this work builds upon the P4STA framework introduced in this work, which allows very accurate measurement of network functions performance. The accuracy of this novel measurement methodology is discussed in the foregoing Chap. 4. First, in Sect. 5.1, we discuss the host bypassing approach while presenting measurement results for various deployment scenarios. Following, the concepts for Internet service creation in access networks are discussed in Sect. 5.2, investigating residential and mobile Internet access technologies. To improve the Quality of Service (QoS) in Internet access networks, we proposed concepts for Active Queue Management (AQM) in programmable hardware, which are evaluated and discussed in Sect. 5.3.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 139.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Hardcover Book
USD 179.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Accel-PPP, Inc. Accel-PPP: High performance PPTP/L2TP/SSTP/PPPoE/IPoE server for Linux. https://accel-ppp.org/. Accessed 04 April 2022

  2. Betker A, Gamrath I, Kosiankowski D, Lange C, Lehmann H, Pfeuffer F, Simon F, Werner A (2014) Comprehensive topology and traffic model of a nationwide telecommunication network. J Opt Commun Netw 6(11):1038–1047

    Article  Google Scholar 

  3. Chang C (2016) dpdk_gtp_gateway. https://github.com/edingroot/dpdk_gtp_gateway

  4. Đerić N, Varasteh A, Van Bemten A, Mas-Machuca C, Kellerer W (2021) Towards understanding the performance of traffic policing in programmable hardware switches. In: 2021 IEEE 7th international conference on network softwarization (NetSoft), pp 70–78

    Google Scholar 

  5. Emmerich P, Gallenmüller S, Raumer D, Wohlfart F, Carle G (2015) MoonGen: a scriptable high-speed packet generator. In: Proceedings of the internet measurement conference. IMC ’15. ACM, New York, NY, USA, pp 275–287

    Google Scholar 

  6. free5gc (2019) https://github.com/free5gc/free5gc

  7. Ibanez S, Brebner G, McKeown N, Zilberman N (2019) The p4-> netfpga workflow for line-rate packet processing. In: Proceedings of the 2019 ACM/SIGDA international symposium on field-programmable gate arrays, pp 1–9

    Google Scholar 

  8. Kundel R, Anderweit L, Markussen J, Griwodz C, Abboud O, Becker B, Meuser T (2022) Host bypassing: let your GPU speak ethernet. In: Proceedings of the 8th international conference on network softwarization (NetSoft). Workshop on edge network softwarization (ENS). IEEE, pp 1–6

    Google Scholar 

  9. Kundel R, Eryigit K, Markussen J, Griwodz C, Abboud O, Hark R, Steinmetz R (2021) Host bypassing: direct data piping from the network to the hardware accelerator. In: Proceedings of the 14th international symposium on embedded multicore/many-core systems-on-chip (MCSoC). Best Paper Award. IEEE, pp 23–30

    Google Scholar 

  10. Nguyen-Ngoc A, Lange S, Geissler S, Zinner T, Tran-Gia P (2018) Estimating the flow rule installation time of SDN switches when facing control plane delay. In: International conference on measurement, modelling and evaluation of computing systems. Springer, pp 113–126

    Google Scholar 

  11. Nielsen J. Xilinx Vitis Unified Software Platform. https://www.xilinx.com/products/design-tools/vitis/vitis-platform.html. Accessed 28 Jan 2022

  12. Rodriguez D (2018) Next generation central offices transform network edge with datacenter economics, cloud flexibility. Blog post. https://builders.intel.com/blog/next-generation-central-office-transform-network-edge/. Accessed 03 Feb 2022

  13. Samdanis K, Rost P, Maeder A, Meo M, Verikoukis C (2015) Green communications: principles, concepts and practice. Wiley, pp 1–419

    Google Scholar 

  14. Xilinx, Inc. (2021) UltraScale Architecture-Based FPGAs Memory IP v1.4. Product Guide. https://docs.xilinx.com/v/u/en-US/pg150-ultrascale-memory-ip

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Ralf Kundel .

Rights and permissions

Reprints and permissions

Copyright information

© 2024 The Author(s), under exclusive license to Springer Nature Switzerland AG

About this chapter

Check for updates. Verify currency and authenticity via CrossMark

Cite this chapter

Kundel, R. (2024). Evaluation. In: Accelerating Network Functions Using Reconfigurable Hardware. Springer Theses. Springer, Cham. https://doi.org/10.1007/978-3-031-52872-9_5

Download citation

  • DOI: https://doi.org/10.1007/978-3-031-52872-9_5

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-031-52871-2

  • Online ISBN: 978-3-031-52872-9

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics