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NTHPC: Embracing Near-Threshold Operation for High Performance Multi-core Systems

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Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2023)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 14385))

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Abstract

System-on-Chip (SoC) manufacturers use Core Level Redundancy (CLR) scheme to cope with fabrication defects. By providing redundancy with extra cores and logic blocks, CLR ensures delivering performance even if a small number of the functional units are defective. CLR even enables selling lower end products if more cores have failed than needed by the most demanding applications. In the current contribution the mechanisms built for CLR are used to increase throughput while complying with the Thermal Design Power (TDP) constraints. We propose NTHPC, that utilizes the designed redundancy support to improve system performance without violating thermal limits. This is done by operating the logic at a voltage close to the threshold voltage of the transistors. Our study using an Intel Xeon multiprocessor shows that Near Threshold Computing (NTC) with CLR mechanisms for thermal controls enabled up to 10.8% average throughput improvement in comparison to plain power gating.

This work was supported by Academy of Finland 6G flagship programme (Grant Number 318927) and by Marie Curie Individual Fellowship (MSCA-IF), EU (Grant Number 898296).

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Correspondence to Mehdi Safarpour .

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Chakraborty, S., Safarpour, M., Silvén, O. (2023). NTHPC: Embracing Near-Threshold Operation for High Performance Multi-core Systems. In: Silvano, C., Pilato, C., Reichenbach, M. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2023. Lecture Notes in Computer Science, vol 14385. Springer, Cham. https://doi.org/10.1007/978-3-031-46077-7_3

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  • DOI: https://doi.org/10.1007/978-3-031-46077-7_3

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  • Publisher Name: Springer, Cham

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  • Online ISBN: 978-3-031-46077-7

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