Abstract
This chapter studies the comparison of two binary numbers in order to rank them. In a generic-purpose processor, such a comparison is usually performed by subtraction, using an existing integer adder. Assuming that the synthesis tools will remove all the hardware that computes the sum bits, this approach is valid in an application-specific architecture. However, devising integer comparison from first principles allows for specific optimizations in some contexts.
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References
Stefania Perri, Paolo Zicari, and Pasquale Corsonello. “Efficient Absolute Difference Circuits in Virtex-5 FPGAs”. In: 5th IEEE Mediterranean Electrotechnical Conference (Melecon). IEEE. 2010, pp. 309–313.
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de Dinechin, F., Kumm, M. (2024). Fixed-Point Comparison. In: Application-Specific Arithmetic. Springer, Cham. https://doi.org/10.1007/978-3-031-42808-1_6
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DOI: https://doi.org/10.1007/978-3-031-42808-1_6
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