Abstract
Sparse neural networks can greatly facilitate the deployment of neural networks on resource-constrained platforms as they offer compact model sizes while retaining inference accuracy. Because of the sparsity in parameter matrices, sparse neural networks can, in principle, be exploited in accelerator architectures for improved energy efficiency and latency. However, to realize these improvements in practice, there is a need to explore sparsity-aware hardware-software co-design. In this chapter, we discuss a novel silicon photonics-based sparse deep neural network inference accelerator called SONIC. SONIC takes advantage of the high energy efficiency and low latency of photonic devices along with software co-optimization to accelerate sparse neural networks. Experimental analysis shows that SONIC can achieve up to 5.8× better performance per watt and 8.4× lower energy per bit than state-of-the-art sparse electronic neural network accelerators and up to 13.8× better performance per watt and 27.6× lower energy per bit than the best known photonic neural network accelerators, at the time.
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Sunny, F., Nikdast, M., Pasricha, S. (2024). Design of Sparsity Optimized Photonic Deep Learning Accelerators. In: Pasricha, S., Shafique, M. (eds) Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing. Springer, Cham. https://doi.org/10.1007/978-3-031-39932-9_13
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