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Polymorphic Primitives for Hardware Security

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Design Automation and Applications for Emerging Reconfigurable Nanotechnologies

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Abstract

While the previous chapters focused on enabling design automation techniques for Reconfigurable Field-Effect Transistors (RFETs)-based circuits, this chapter explores hardware security as an application using RFETs-based primitives. This chapter presents efficient and affordable Intellectual Property (IP) protection measures that can be realized using the reconfigurable properties of RFETs.

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Notes

  1. 1.

    This is assumed considering the fact that once the scenario of short circuit or open circuit is activated, irrespective of the previous state, the logic gate will be in one of the conditions as mentioned in Table 7.1.

  2. 2.

    This is because RFETs can have multi-independent terminals on a single channel as explained in Chap. 2.

  3. 3.

    Iddq testing measures the supply current of a chip (or a given module) in the quiescent state (i.e., when the circuit is not switching and inputs are held at static/constant values) to detect manufacturing and/or electrical defects.

  4. 4.

    It is to be noted that ITC-99 benchmark suite is more representative of the security community particularly in works related to logic locking compared to let us say EPFL benchmarks [AGD15].

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  1. Department of Computer Science, TU Dresden, Dresden, Germany

    Shubham Rai & Akash Kumar

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Rai, S., Kumar, A. (2024). Polymorphic Primitives for Hardware Security. In: Design Automation and Applications for Emerging Reconfigurable Nanotechnologies. Springer, Cham. https://doi.org/10.1007/978-3-031-37924-6_7

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  • DOI: https://doi.org/10.1007/978-3-031-37924-6_7

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