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Frontiers of Quality Electronic Design (QED) pp 415–464Cite as

Enabling Edge Computing Using Emerging Memory Technologies: From Device to Architecture

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Abstract

This book chapter describes, explores, and analyzes the designs and framework for energy-efficient and reliable edge computing from device to architecture to handle and compute data-intensive tasks and applications. First, we present a comprehensive study regarding magnetic random-access memory (MRAM) as a promising nonvolatile memory component due to its interesting features, including nonvolatility, near-zero standby power, high integration density, and radiation hardness. To enable efficient and reliable computing units, optimized in-memory processing accelerators for data and compute-intensive tasks via algorithm and hardware codesign approaches are discussed. Moreover, two other high attention topics, namely, normally off computing and hardware security, are examined. Thus, two design methodologies are introduced to mitigate MRAM write energy cost while provided benefits are efficiently utilized. The first design methodology approach, referred to as NV-clustering, is developed to realize middleware-transparent intermittent computing. The foundations of our work are advanced from the ground up by extending this emerging MRAM device to discover logic-in-memory methods that leverage intrinsic nonvolatility to realize intermittent robust computation. Then power analysis-resilient circuit (PARC) procedure as an extension of NV-clustering is developed as a power-masked synthesis technique in the presence of power analysis attacks.

Keywords

  • Magnetic random-access memory
  • In-memory processing
  • Normally off computing
  • Hardware security

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Notes

  1. 1.

    Almost all the previous checkpointing techniques suffer from data movement overhead, new programming paradigms, and internal and external consistency.

  2. 2.

    Note: SOT-MTJ and SHE-MTJ are used interchangeably in this chapter book.

  3. 3.

    A variation of this design is named PIM-Aligner [57].

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Authors and Affiliations

  1. School of Computing, University of Nebraska-Lincoln, Lincoln, NE, USA

    Arman Roohi

  2. Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ, USA

    Shaahin Angizi

  3. School of Electrical; Computer and Energy Engineering, Arizona State University, Tempe, AZ, USA

    Deliang Fan

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  1. Arman Roohi
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  1. Silicon Valley Polytechnic Institute, Los Altos Hills, CA, USA

    Ali Iranmanesh

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Roohi, A., Angizi, S., Fan, D. (2023). Enabling Edge Computing Using Emerging Memory Technologies: From Device to Architecture. In: Iranmanesh, A. (eds) Frontiers of Quality Electronic Design (QED). Springer, Cham. https://doi.org/10.1007/978-3-031-16344-9_11

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