Abstract
This chapter provides a brief introduction to System-on-Chip (SoC) Field Programmable Gate Arrays (FPGAs). A brief history of digital devices is given to place FPGAs in their historical context. We are at a point in computer systems where the only path forward in terms of performance is to go parallel and FPGAs are inherently parallel devices. The basic architecture of FPGAs is given with a brief description of the resources that exist in the FPGA fabric. These resources include general purpose I/O, memory, and DSP blocks. Then an overview of the SoC FPGA architecture is given where a complete ARM based computer system has been added to the FPGA fabric, which makes it a SoC FPGA device.
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References
I. Bojanova, The digital revolution: What’s on the Horizon? IT Prof. 16(1), 8–12 (2014)
G.E. Moore, Cramming more components onto integrated circuits. Electronics 38(8) (1965). https://newsroom.intel.com/wp-content/uploads/sites/11/2018/05/moores-law-electronics.pdf
D. Schor, TSMC Ramps 5nm, Discloses 3nm to Pack Over a Quarter-Billion Transistors Per Square Millimeter. https://fuse.wikichip.org/ news/ 3453/ tsmc- ramps- 5nm- discloses- 3nm-to- pack-over- a-quarter- billion- transistors- per- square-millimeter/. Accessed 23 June 2022
WikiChip, 5 nm lithography process. https://en.wikichip.org/wiki/5_nm_lithography_process. Accessed 23 June 2022
WikiChip, 7 nm lithography process. https://en.wikichip.org/wiki/7_nm_lithography_process. Accessed 23 June 2022
K. Rupp, 42 Years of Microprocessor Trend Data. https://www.karlrupp.net/2018/02/42-years-of-microprocessor-trend-data/. Accessed 23 June 2022
J.L. Hennessy, D.A. Patterson, Computer Architecture: A Quantitative Approach (Morgan Kaufmann, Burlington, 2011)
HWBOT, CPU FREQUENCY: HALL OF FAME, World Records achieved with CPU Frequency. https://hwbot.org/benchmark/cpu_frequency/halloffame. Accessed 23 June 2022
Intel, Cyclone V Product Table. https://www.intel.com/content/dam/support/us/en/programmable/support-resources/bulk-container/pdfs/literature/pt/cyclone-v-product-table.pdf. Accessed 27 June 2022
Altera, FPGA Architecture White Paper. https://www.intel.com/content/dam/support/us/en/programmable/support-resources/bulk-container/pdfs/literature/wp/wp-01003.pdf. Accessed 27 June 2022
Intel, Cyclone V Adaptive Logic Module. https://www.intel.com/content/www/us/en/docs/programmable/683694/current/adaptive-logic-module.html. Accessed 27 June 2022
Intel, Cyclone V HPS Features. https://www.intel.com/content/www/us/en/docs/programmable/683694/current/hps-features.html. Accessed 27 June 2022
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Snider, R. (2023). Chapter 2: Introduction to System-on-Chip Field Programmable Gate Arrays. In: Advanced Digital System Design using SoC FPGAs. Springer, Cham. https://doi.org/10.1007/978-3-031-15416-4_2
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DOI: https://doi.org/10.1007/978-3-031-15416-4_2
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