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Machine Learning for Logic Synthesis

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Machine Learning Applications in Electronic Design Automation

Abstract

In this chapter we will cover several applications of machine learning in logic synthesis algorithms for electronic design automation (EDA). We will discuss how machine learning models can learn to guide optimization algorithms or learn optimization policies directly. We will study supervised learning or reinforcement learning formulations for various logic synthesis algorithms. We will discuss the architecture of corresponding machine learning models. For reinforcement learning formulations, we will discuss state-action spaces and their representation. We will also discuss scalability considerations for reinforcement learning applications in logic synthesis.

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References

  1. Abc: A system for sequential synthesis and verification. Berkeley Logic Synthesis and Verification Group. http://www.eecs.berkeley.edu/~alanmi/abc/

  2. Soeken, M., Riener, H., Haaswijk, W., De Micheli, G.: The EPFL logic synthesis libraries. In: International Workshop on Logic Synthesis (2018). Pre-print available at arXiv:1805.05121

    Google Scholar 

  3. Mishchenko, A., Chatterjee, S., Jiang, R., Brayton, R.K.: FRAIGs: a unifying representation for logic synthesis and verification. In: ERL Technical Report (2005)

    Google Scholar 

  4. Amarù, L.G., Gaillardon, P.E., De Micheli, G.: Majority-inverter graph: a novel data-structure and algorithms for efficient logic optimization. In: Design Automation Conference, pp. 194:1–194:6 (2014)

    Google Scholar 

  5. Mishchenko, A., Cho, S., Chatterjee, S., Brayton, R.: Combinational and sequential mapping with priority cuts. In: 2007 IEEE/ACM International Conference on Computer-Aided Design, pp. 354–361 (2007). https://doi.org/10.1109/ICCAD.2007.4397290

  6. Chatterjee, S., Mishchenko, A., Brayton, R.K., Wang, X., Kam, T.: Reducing structural bias in technology mapping. In: IEEE Trans. Comput.-Aided Design Integr. Circuits Syst. 25(12), 2894–2903 (2006). https://doi.org/10.1109/TCAD.2006.882484

    Google Scholar 

  7. Zimmermann, R.: Non-heuristic optimization and synthesis of parallel-prefix adders. In: Proc. of IFIP Workshop. Citeseer (1996)

    Google Scholar 

  8. Roy, R., et al.: PrefixRL: optimization of parallel prefix circuits using deep reinforcement learning. In: 2021 58th ACM/IEEE Design Automation Conference (DAC), pp. 853–858 (2021). https://doi.org/10.1109/DAC18074.2021.9586094

  9. Yu, C., Zhou, W.: Decision making in synthesis cross technologies using LSTMs and transfer learning. In: 2020 ACM/IEEE 2nd Workshop on Machine Learning for CAD (MLCAD), pp. 55–60 (2020). https://doi.org/10.1145/3380446.3430638

  10. van Hasselt, H., Guez, A., Silver, D.: Deep reinforcement learning with double q-learning. In: AAAI’16 Proceedings of the Thirtieth AAAI Conference on Artificial Intelligence, pp. 2094–2100 (2016)

    Google Scholar 

  11. Sutton, R.S., McAllester, D.A., Singh, S.P., Mansour, Y., et al.: Policy gradient methods for reinforcement learning with function approximation. In: NIPS, vol. 99, pp. 1057–1063 (1999)

    Google Scholar 

  12. Konda, V.R., Tsitsiklis, J.N.: Actor-critic algorithms. In: Advances in Neural Information Processing Systems, pp. 1008–1014 (2000)

    Google Scholar 

  13. Neto, W.L., Austin, M., Temple, S., Amaru, L., Tang, X., Gaillardon, P.-E.: LSOracle: a logic synthesis framework driven by artificial intelligence: invited paper. In: 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 1–6 (2019). https://doi.org/10.1109/ICCAD45719.2019.8942145

  14. Yu, C., Xia, H., De Micheli, G.: Developing synthesis flows without human knowledge. In: 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC), pp. 1–6 (2018). https://doi.org/10.1109/DAC.2018.8465913

  15. Hosny, A., Hashemi, S., Shalan, M., Reda, S.: DRiLLS: deep reinforcement learning for logic synthesis. In: 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 581–586 (2020). https://doi.org/10.1109/ASP-DAC47756.2020.9045559

  16. Zhu, K., Liu, M., Chen, H., Zhao, Z., Pan, D.Z.: Exploring logic optimizations with reinforcement learning and graph convolutional network. In: 2020 ACM/IEEE 2nd Workshop on Machine Learning for CAD (MLCAD), pp. 145–150 (2020). https://doi.org/10.1145/3380446.3430622

  17. Peruvemba, Y.V., Rai, S., Ahuja, K., Kumar, A.: RL-guided runtime-constrained heuristic exploration for logic synthesis. In: 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), pp. 1–9 (2021). https://doi.org/10.1109/ICCAD51958.2021.9643530

  18. Neto, W.L., Moreira, M.T., Li, Y., Amarù, L., Yu, C., Gaillardon, P.-E.: SLAP: a supervised learning approach for priority cuts technology mapping. In: 2021 58th ACM/IEEE Design Automation Conference (DAC), pp. 859–864 (2021). https://doi.org/10.1109/DAC18074.2021.9586230

  19. Neto, W.L., Trevisan Moreira, M., Amaru, L., Yu, C., Gaillardon, P.-E.: Read your circuit: leveraging word embedding to guide logic optimization. In: 2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 530–535 (2021)

    Google Scholar 

  20. Haaswijk, W., et al.: Deep learning for logic optimization algorithms. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–4 (2018). https://doi.org/10.1109/ISCAS.2018.8351885

  21. Yu, C.: FlowTune: practical multi-armed bandits in boolean optimization. In: 2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), pp. 1–9 (2020)

    Google Scholar 

  22. Auer, P., Cesa-Bianchi, N., Fischer, P.: Finite-time analysis of the multiarmed bandit problem. Mach. Learn. 47(2), 235–256 (2002)

    Article  MATH  Google Scholar 

  23. Agiza, A., Reda, S.: Openphysyn: an open-source physical synthesis optimization toolkit. In: 2020 Workshop on Open-Source EDA Technology (WOSET) (2020)

    Google Scholar 

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Correspondence to Rajarshi Roy .

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Roy, R., Godil, S. (2022). Machine Learning for Logic Synthesis. In: Ren, H., Hu, J. (eds) Machine Learning Applications in Electronic Design Automation. Springer, Cham. https://doi.org/10.1007/978-3-031-13074-8_7

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