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Machine Learning for Mask Synthesis and Verification

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Machine Learning Applications in Electronic Design Automation

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Abstract

The explosion of machine learning and AI techniques has brought great opportunities of data-assisted optimization for VLSI design automation problems. Recent studies have demonstrated promising results dealing with lithography compliance issues. In this chapter, we will introduce successful attempts using machine learning for mask synthesis and verification, including lithograph modeling, hotspot detection, mask optimization, and layout pattern generation. We hope this chapter can motivate future research on AI-assisted DFM solutions.

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Notes

  1. 1.

    Here s itself is meaningless, and we simply use \(\tilde {\boldsymbol {s}}\) to indicate the term is related to frequency domain.

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Authors and Affiliations

  1. nVIDIA Corp., Austin, TX, USA

    Haoyu Yang

  2. Peking University, Beijing, China

    Yibo Lin

  3. The Chinese University of Hong Kong, Hong Kong, China

    Bei Yu

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  1. Haoyu Yang
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  2. Yibo Lin
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  3. Bei Yu
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Correspondence to Haoyu Yang .

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Editors and Affiliations

  1. NVIDIA, Austin, TX, USA

    Haoxing Ren

  2. Texas A&M University, College Station, TX, USA

    Jiang Hu

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Yang, H., Lin, Y., Yu, B. (2022). Machine Learning for Mask Synthesis and Verification. In: Ren, H., Hu, J. (eds) Machine Learning Applications in Electronic Design Automation. Springer, Cham. https://doi.org/10.1007/978-3-031-13074-8_15

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