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Parallel Cache Prefetching for LSM-Tree Based Store: From Algorithm to Evaluation

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Algorithms and Architectures for Parallel Processing (ICA3PP 2021)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 13155))

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Abstract

The Log-Structured Merge-Tree has efficient writing performance and performs well in big data scenarios. An LSM-tree transforms random writes into batch sequential writes through the design of a multilayer storage structure. However, as the core operation, the compaction inevitably results in degrading periodically in the read performance. Regular but irregular data compaction operations make the cache challenging to track the access information of data blocks. This work studies how to address the cache invalidation problem. We propose a two-phase parallel prefetching approach, which can effectively improve the cache invalidation when the compaction occurs. Our experimental results show our method can effectively improve read performance.

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Acknowledgments

This work was supported in part the National Science Foundation of China Projects (61971309) and Tianjin Science Foundation Project (18JCYBJC85500).

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Correspondence to Guangping Xu .

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Zhang, S., Xu, G., Jia, Y., Xue, Y., Zheng, W. (2022). Parallel Cache Prefetching for LSM-Tree Based Store: From Algorithm to Evaluation. In: Lai, Y., Wang, T., Jiang, M., Xu, G., Liang, W., Castiglione, A. (eds) Algorithms and Architectures for Parallel Processing. ICA3PP 2021. Lecture Notes in Computer Science(), vol 13155. Springer, Cham. https://doi.org/10.1007/978-3-030-95384-3_15

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  • DOI: https://doi.org/10.1007/978-3-030-95384-3_15

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  • Print ISBN: 978-3-030-95383-6

  • Online ISBN: 978-3-030-95384-3

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