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Design of a Hardware Accelerator for Zero-Knowledge Proof in Blockchains

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Smart Computing and Communication (SmartCom 2020)

Part of the book series: Lecture Notes in Computer Science ((LNISA,volume 12608))

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Abstract

With the popularization and maturity of blockchain technology, more and more industries and projects are gradually trying to combine blockchain technology, including digital currency, Internet of Things, 5G new infrastructure. The most important thing for these applications is to require its safety. These security services are usually provided by cryptographic protocols, and zero-knowledge proof is such a core technology to provide the bottom layer of security services. However, the most widely used protocol named zk-SNARK, involves solving multiple large-scale examples of tasks related to polynomial arithmetic on large prime fields of cryptography and multi-exponentiations on elliptic curve groups. Complicated and huge calculations bring longer prover time, which hinders the implementation of some applications. In this paper, we propose a design of hardware accelerator based on FPGA for zero-knowledge proof. The zk-SNARK engine which is combined of multiple FFT, MAC and ECP units reduces the prover time by 10x and provides the possibility for future blockchain terminals based on mobile devices.

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Acknowledgment

This work is supported by the National Natural Science Foundation of China (Grant No. 61772331), Natural Science Foundation of China (grant No. U1831118), the Strategic Priority Research Program of Chinese Academy of Sciences (Grant No. XDC02070800), Shanghai Municipal Science and Technology Commission (grant No. 19511131202), Pudong Industry-University-Research Project (grant PKX2019-D02), Independent Deployment Project of Shanghai Advanced Research Institute (grant E0560W1ZZ0). I would like to express my gratitude to all those who helped me during writing this paper. Firstly, thanks to all my team members who gave me much useful advice and encouragement. And gratitude to my parents for their nurturing and support.

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Correspondence to Yongxin Zhu .

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Peng, B.O., Zhu, Y., Jing, N., Zheng, X., Zhou, Y. (2021). Design of a Hardware Accelerator for Zero-Knowledge Proof in Blockchains. In: Qiu, M. (eds) Smart Computing and Communication. SmartCom 2020. Lecture Notes in Computer Science(), vol 12608. Springer, Cham. https://doi.org/10.1007/978-3-030-74717-6_15

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  • DOI: https://doi.org/10.1007/978-3-030-74717-6_15

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-74716-9

  • Online ISBN: 978-3-030-74717-6

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