Abstract
This chapter proposes a demonstration of edge detection on field-programmable gate array (FPGA), enabling to detect the edge of 320 × 240 size of images at 1302 frames per second (fps). The future work is an integrated system on chip (SoC) with a low-cost bus architecture, a security engine, and an image/video processing data path including OV7670 camera and VGA-interfaced display. The end goal will be a demonstration and simulation on self-driving vehicle to detect obstacles at the network edge. The design of many intellectual properties (IPs) of the SoC has been made publicly available to serve research and teaching courses at University of Houston-Clear Lake (UHCL), as well as to bring together researchers in other universities with interests in integrated circuit design, robotics, and FPGA prototyping.
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Yang, X., Yang, T.A., Wu, L. (2021). An Edge Detection IP of Low-Cost System on Chip for Autonomous Vehicles. In: Arabnia, H.R., Ferens, K., de la Fuente, D., Kozerenko, E.B., Olivas Varela, J.A., Tinetti, F.G. (eds) Advances in Artificial Intelligence and Applied Cognitive Computing. Transactions on Computational Science and Computational Intelligence. Springer, Cham. https://doi.org/10.1007/978-3-030-70296-0_56
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