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Lightweight Anonymous Routing for On-chip Interconnects

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Network-on-Chip Security and Privacy
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Abstract

Advances in manufacturing technologies have enabled System-on-Chip (SoC) designers to integrate an increasing number of cores on a single SoC. Increasing SoC complexity, coupled with tight time-to-market deadlines, has led to increased utilization of Intellectual Property (IP) cores from third-party vendors. SoC supply chain is widely acknowledged as a major source of security vulnerabilities. Potentially malicious third-party IPs integrated on the same Network-on-Chip (NoC) with the trusted components can lead to security and trust concerns. While secure communication is a well-studied problem in the computer networks domain, it is not feasible to implement those solutions on resource-constrained SoCs. This chapter explores anonymous routing protocols and encryption schemes for communication between IP cores in NoC-based SoCs. The methods explored in this chapter eliminate the major overhead associated with traditional encryption and anonymous routing protocols. A novel encryption and anonymous routing protocol are presented, which is based on a secret sharing mechanism. Experimental results demonstrate that the proposed approach can provide the desired security guarantees while incurring minimum performance overhead.

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Notes

  1. 1.

    A nonce is a random number that is used only once during the lifetime of a cryptographic operation.

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Acknowledgements

This work was partially supported by the National Science Foundation (NSF) grant SaTC-1936040.

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Correspondence to Subodha Charles .

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Charles, S., Mishra, P. (2021). Lightweight Anonymous Routing for On-chip Interconnects. In: Mishra, P., Charles, S. (eds) Network-on-Chip Security and Privacy. Springer, Cham. https://doi.org/10.1007/978-3-030-69131-8_6

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  • DOI: https://doi.org/10.1007/978-3-030-69131-8_6

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