Abstract
In practice, multioutput functions instead of single functions are implemented. By using common dependencies for several functions, a realization that consumes a smaller number of logical resources of a programmable device than that if each function is separately treated can be achieved.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Kubica M, Kania D, Opara A (2016) Decomposition time effectiveness for various synthesis strategies dedicated to FPGA structures. In: International conference of computational methods in sciences and engineering. American Institute of Physics, Athens, 17 Mar 2016, Seria: AIP Conference Proceedings; vol 1790
Kubica M, Opara A, Kania D (2017) Logic synthesis for FPGAs based on cutting of BDD. Microprocess Microsyst 52:173–187
Lai Y, Pan KR, Pedram M (1996) OBDD-based function decomposition: algorithms and implementation. IEEE Trans Comput-Aided Des 15(8):977–990
Opara A (2006) Wykorzystanie binarnych diagramów decyzyjnych do syntezy wielopoziomowych układow logicznych, Materiały konferencyjne Reprogramowalne Układy Cyfrowe, Pomiary, Automatyka, Kontrola, Szczecin, pp 115–117
Opara A, Kania D (2007) Synteza wielowyjściowych układow logicznych prowadząca do wykorzystania wspólnych bloków logicznych, Materiały konferencyjne Reprogramowalne Układy Cyfrowe, Pomiary, Automatyka, Kontrola, Szczecin, pp 39–42
Wurth B, Schlichtmann U, Eckl K, Antreich KJ (1999) Functional multiple-output decomposition with application to technology mapping for lookup table-based FPGAs. ACM Trans Des Autom Electr Syst 4(3):313–350
Opara A, Kubica M, Kania D (2019) Methods of improving time efficiency of decomposition dedicated at FPGA structures and using BDD in the process of cyber-physical synthesis. IEEE Access 7:20619–20631. doi: 10.1109/ACCESS.2019.2898230
Opara A, Kubica M, Kania D (2018) Strategy of logic synthesis using MTBDD dedicated to FPGA. Integration VLSI Journal 62:142–158
Opara A, Kubica M (2017) Optimization of synthesis process directed at FPGA circuits with the usage of non-disjoint decomposition. In: Proceedings of the international conference of computational methods in sciences and engineering 2017. American Institute of Physics, Thessaloniki, 2017.04.21, Seria: AIP Conference Proceedings; vol 1906, Art. no. 120004
Opara A, Kubica M (2018) The choice of decomposition path taking non-disjoint decomposition into account. In: Proceedings of the international conference of computational methods in sciences and engineering 2018. American Institute of Physics, Thessaloniki, 14 Mar 2018, Seria: AIP Conference Proceedings; vol 2040, Art. no. 080010
Minato S (1996) Binary decision diagrams and applications for VLSI CAD. Kluwer Academic Publishers, Boston
Kubica M, Kania D (2015) SMTBDD: new concept of graph for function decomposition, IFAC conference on programmable devices and embedded systems PDeS, Cracow vol VII, 519, pp 61–66
Kubica M, Kania D (2016) SMTBDD: new form of BDD for logic synthesis. Int J Electron Telecommun 62(1):33–41
Kubica M, Kania D (2017) Area-oriented technology mapping for LUT-based logic blocks. Int J Appl Math Comput Sci 27(1):207–222
Kubica M, Kania D (2017) Decomposition of multi-output functions oriented to configurability of logic blocks. Bull Polish Acad Sci Tech Sci 65(3):317–331
Kubica M, Kania D (2019) Technology mapping oriented to adaptive logic modules. Bull Polish Acad Sci Tech Sci 67(5):947–956
Kubica M (2014) Decomposition and technology mapping based on BDD—PhD thesis, Gliwice. https://ssuise-keit.multimedia.edu.pl/doktoraty.php (in Polish)
Opara A (2009) Decompositional methods of combinational systems synthesis based on BDD—PhD thesis, Gliwice. https://ssuise-keit.multimedia.edu.pl/doktoraty.php (in Polish)
Opara A, Kubica M (2016) Decomposition synthesis strategy directed to FPGA with special MTBDD representation. In: International conference of computational methods in sciences and engineering. American Instytut of Physics, Athens, 17 Mar 2016, Seria: AIP Conference Proceedings; vol 1790
Bryant RE (1986) Graph based algorithms for Boolean function manipulation. IEEE Trans Comput C-35(8):677–691
Author information
Authors and Affiliations
Rights and permissions
Copyright information
© 2021 The Author(s), under exclusive license to Springer Nature Switzerland AG
About this chapter
Cite this chapter
Kubica, M., Opara, A., Kania, D. (2021). Decomposition of Multioutput Functions Described Using BDD. In: Technology Mapping for LUT-Based FPGA. Lecture Notes in Electrical Engineering, vol 713. Springer, Cham. https://doi.org/10.1007/978-3-030-60488-2_8
Download citation
DOI: https://doi.org/10.1007/978-3-030-60488-2_8
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-60487-5
Online ISBN: 978-3-030-60488-2
eBook Packages: EngineeringEngineering (R0)