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European Conference on Parallel Processing

Euro-Par 2020: Euro-Par 2020: Parallel Processing pp 629–644Cite as

SYCL-Bench: A Versatile Cross-Platform Benchmark Suite for Heterogeneous Computing

Part of the Lecture Notes in Computer Science book series (LNTCS,volume 12247)

Abstract

The SYCL standard promises to enable high productivity in heterogeneous programming of a broad range of parallel devices, including multicore CPUs, GPUs, and FPGAs. Its modern and expressive C++ API design, as well as flexible task graph execution model give rise to ample optimization opportunities at run-time, such as the overlapping of data transfers and kernel execution. However, it is not clear which of the existing SYCL implementations perform such scheduling optimizations, and to what extent. Furthermore, SYCL’s high level of abstraction may raise concerns about sacrificing performance for ease of use. Benchmarks are required to accurately assess the performance behavior of high-level programming models such as SYCL. To this end, we present SYCL-Bench, a versatile benchmark suite for device characterization and runtime benchmarking, written in SYCL. We experimentally demonstrate the effectiveness of SYCL-Bench by performing device characterization of the NVIDIA TITAN X GPU, and by evaluating the efficiency of the hipSYCL and ComputeCpp SYCL implementations.

Keywords

  • SYCL benchmarks
  • Heterogeneous computing
  • SYCL runtime
  • Cross platform

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Notes

  1. 1.

    https://github.com/bcosenza/sycl-bench.

  2. 2.

    Given that a suitable C++ compiler exists for the hardware.

  3. 3.

    This approach assumes the existence of one or more OpenCL implementations available on the host machine. If no OpenCL implementation is available, then the SYCL implementation provides only the SYCL host device to run kernels on [12].

  4. 4.

    https://developer.codeplay.com/products/computecpp/ce/guides/platform-support/targeting-nvidia-ptx?version=1.3.0.

References

  1. Parboil Benchmarks Suite (2007). http://impact.crhc.illinois.edu/parboil.php

  2. Alpay, A.: hipSYCL. https://github.com/illuhad/hipSYCL

  3. Burtscher, M., Nasre, R., Pingali, K.: A quantitative study of irregular programs on GPUs. In: Proceedings of IEEE, IISWC (2012)

    Google Scholar 

  4. Che, S., et al.: Rodinia: a benchmark suite for heterogeneous computing. In: Proceedings of the IEEE International Symposium on Workload Characterization, IISWC (2009)

    Google Scholar 

  5. Che, S., Sheaffer, J.W., Boyer, M., Szafaryn, L.G., Wang, L., Skadron, K.: A characterization of the Rodinia benchmark suite with comparison to contemporary CMP workloads. In: Proceedings of the IEEE International Symposium on Workload Characterization, IISWC (2010)

    Google Scholar 

  6. Codeplay Software: ComputeCpp. https://codeplay.com/products/computesuite/computecpp

  7. Danalis, A., et al.: The scalable heterogeneous computing (SHOC) benchmark suite. In: Proceedings of the 3rd Workshop on GPGPU (2010)

    Google Scholar 

  8. Fang, W., He, B., Luo, Q., Govindaraju, N.K.: Mars: accelerating MapReduce with graphics processors. IEEE Trans. Parallel Distrib. Syst. 22, 608–620 (2011)

    CrossRef  Google Scholar 

  9. Grauer-Gray, S., Xu, L., Searles, R., Ayalasomayajula, S., Cavazos, J.: Auto-tuning a high-level language targeted to GPU codes. In: Proceedings InPar (2012)

    Google Scholar 

  10. Intel: SYCL Compiler. https://github.com/intel/llvm

  11. Jia, Z., Maggioni, M., Smith, J., Scarpazza, D.P.: Dissecting the NVidia Turing T4 GPU via microbenchmarking. arXiv preprint arXiv:1903.07486 (2019)

  12. Khronos: SYCL 1.2.1. Technical report, Khronos Group, Inc. (2020). https://www.khronos.org/registry/SYCL/specs/sycl-1.2.1.pdf

  13. Khronos Group: Codeplay announces world’s first fully-conformant sycl 1.2.1 solution (2018). https://www.khronos.org/news/permalink/codeplay-announces-worlds-first-fully-conformant-sycl-1.2.1-solution

  14. Kulkarni, M., Burtscher, M., Cascaval, C., Pingali, K.: Lonestar: a suite of parallel irregular programs. In: IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS (2009)

    Google Scholar 

  15. Lal, S., Lucas, J., Andersch, M., Alvarez-Mesa, M., Elhossini, A., Juurlink, B.: GPGPU workload characteristics and performance analysis. In: International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS (2014)

    Google Scholar 

  16. Lal, S., et al.: Artifact and Instructions to Generate Main Experimental Results for Conference Proceeding 2020 Paper: SYCL-Bench: A Versatile Cross-Platform Benchmark Suite for Heterogeneous Computing (2020). https://doi.org/10.6084/m9.figshare.12562670, https://springernature.figshare.com/articles/dataset/Artifact_and_Instructions_to_Generate_Main_Experimental_Results_for_Conference_Proceeding_2020_Paper_SYCL-Bench_A_Versatile_Cross-Platform_Benchmark_Suite_for_Heterogeneous_Computing/12562670/1

  17. Lopes, A., Pratas, F., Sousa, L., Ilic, A.: Exploring GPU performance, power and energy-efficiency bounds with cache-aware roofline modeling. In: IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS, pp. 259–268 (2017)

    Google Scholar 

  18. Mei, X., Chu, X.: Dissecting GPU memory hierarchy through microbenchmarking. IEEE Trans. Parallel Distrib. Syst. 28, 72–86 (2017)

    CrossRef  Google Scholar 

  19. Potter, R., Keir, P., Bradford, R.J., Murray, A.: Kernel composition in SYCL. In: Proceedings of the 3rd Workshop on OpenCL, IWOCL (2015)

    Google Scholar 

  20. Silva, H.C.D., Pisani, F., Borin, E.: A Comparative Study of SYCL, OpenCL, and OpenMP. In: Proceedings of SBAC-PADW (2016)

    Google Scholar 

  21. The triSYCL Project: triSYCL. https://github.com/trisycl/trisycl

  22. Thoman, P., Kofler, K., Studt, H., Thomson, J., Fahringer, T.: Automatic OpenCL device characterization: guiding optimized kernel design. In: Jeannot, E., Namyst, R., Roman, J. (eds.) Euro-Par 2011. LNCS, vol. 6853, pp. 438–452. Springer, Heidelberg (2011). https://doi.org/10.1007/978-3-642-23397-5_43

    CrossRef  Google Scholar 

  23. Thoman, P., Salzmann, P., Cosenza, B., Fahringer, T.: Celerity: high-level C++ for accelerator clusters. In: Yahyapour, R. (ed.) Euro-Par 2019: Parallel Processing. LNCS, vol. 11725, pp. 291–303. Springer, Heidelberg (2019). https://doi.org/10.1007/978-3-030-29400-7_21

    CrossRef  Google Scholar 

  24. Zhang, Y., Hu, Y., Li, B., Peng, L.: Performance and power analysis of ATI GPU: a statistical approach. In: Proceedings of 6th NAS (2011)

    Google Scholar 

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Acknowledgements and Data Availability Statement

This research has been partially funded by the FWF (I 3388) and DFG (CO 1544/1-1, project number 360291326) as part of the DACH project CELERITY.

The datasets and code generated during and/or analysed during the current study are available in the Figshare repository: https://doi.org/10.6084/m9.figshare.12562670 [16].

Author information

Authors and Affiliations

  1. Technical University of Berlin, Berlin, Germany

    Sohan Lal & Nicolai Stawinoga

  2. Heidelberg University, Heidelberg, Germany

    Aksel Alpay & Vincent Heuveline

  3. University of Innsbruck, Innsbruck, Austria

    Philip Salzmann, Alexander Hirsch, Peter Thoman & Thomas Fahringer

  4. University of Salerno, Fisciano, Italy

    Biagio Cosenza

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  1. Sohan Lal
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  2. Aksel Alpay
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  9. Vincent Heuveline
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Correspondence to Sohan Lal .

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Editors and Affiliations

  1. AGH University of Science and Technology, Krakow, Poland

    Dr. Maciej Malawski

  2. University of Warsaw, Warsaw, Poland

    Krzysztof Rzadca

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Lal, S. et al. (2020). SYCL-Bench: A Versatile Cross-Platform Benchmark Suite for Heterogeneous Computing. In: Malawski, M., Rzadca, K. (eds) Euro-Par 2020: Parallel Processing. Euro-Par 2020. Lecture Notes in Computer Science(), vol 12247. Springer, Cham. https://doi.org/10.1007/978-3-030-57675-2_39

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  • DOI: https://doi.org/10.1007/978-3-030-57675-2_39

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