Abstract
Previous trends in System-on-Chip (SoC) design were focused on improving the performance of the system without giving significant consideration to power consumption. Complementary-Metal-Oxide-Semiconductor (CMOS) is the widely accepted technology for designing SoCs for over three decades. Performance improvements of CMOS systems came mostly through technology scaling and when speed could not be increased any further, the growing number of transistors per chip, which followed Moore’s law, led to multi-core processor chips. Technology scaling significantly improved the system performance and allowed to increase complexity of systems in cost-effective ways. However, power consumption became the major constraint in design specifications because of increased leakage with every new technology node.
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Gupta, N., Makosiej, A., Amara, A., Vladimirescu, A., Anghel, C. (2021). Introduction. In: TFET Integrated Circuits. Springer, Cham. https://doi.org/10.1007/978-3-030-55119-3_1
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DOI: https://doi.org/10.1007/978-3-030-55119-3_1
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