Microsystems Process Integration, Testing, and Packaging

  • Michael Huff
Part of the Microsystems and Nanosystems book series (MICRONANO)


This chapter covers the important topic process integration where a number of individual processing steps (covered in Chaps.  3 and  4) are combined into a process sequence for the implementation of MEMS devices. A general outline of yield improvement activities is given. Some of the challenges of process integration for MEMS are discussed including the significant time, cost, and risk that are commonly encountered. Integrated MEMS process sequences are defined as the merging of microelectronics onto the same substrate as the MEMS devices. Reasons why attempting to develop integrated MEMS is so difficult are also explained. Two notable examples of process technologies are reviewed; the first is a generic MEMS surface micromachining process sequence, and the second is an integrated MEMS process technology. Parameter variations that arise in process sequences are discussed, and an example of the parameter variations of a well-known MEMS process technology called PolyMUMPS™ is reviewed. The concept of design rules in microsystems manufacturing is then covered along with a review of the design rules for the PolyMUMPS™ process sequence. This chapter also briefly discusses the testing and packaging of MEMS, including device trimming and calibration.


Process integration Process runcard Short loops Process development Integrated MEMS process sequence Process technology Design rules Microsystems testing Microsystems packaging Microsystems trimming Microsystems calibration 


  1. 1.
    A. Cowen, B. Hardy, R. Mahadevan, S. Wilcenski, POlyMUMPs Design Handbook, a MUMPs® process. Revision 13.0, copyright 2011, MEMSCapGoogle Scholar
  2. 2.
    Wicht Technologie Consulting, “MEMS 30” Top 30 MEMS manufacturers in 2006 by revenue,
  3. 3.
    L.J. Hornbeck, From Cathode Rays to Digital Micromirrors: A History of Electronic Projection Display Technology. Texas Inst. Tech. J. 15(3), 7–46 (1998). Also at http://www.dlp.comGoogle Scholar
  4. 4.
    J. Grimmett, J. Huffman, Advancements in DLP® technology – the new 10.8 μm pixel and beyond. IDW/AD’05, Proc 12th Intl. Display Workshops, (in conjunction with Asia Display 2005) 2, 1879–1882 (2005)Google Scholar
  5. 5.
    L.J. Hornbeck, Combining Digital Optical MEMS, CMOS, and Algorithms for Unique Display Solutions (IEEE International Electron Devices Meeting Technical Digest, Plenary Session, 2007), pp. 17–24Google Scholar
  6. 6.
    M.R. Douglass, MEMS reliability – coming of age. Proc. SPIE 6884, 688402 (2008)CrossRefGoogle Scholar
  7. 7.
    D. Koester, B. Hardy, MCNC PolyMUMPS staff engineering communicationGoogle Scholar
  8. 8.
    W.N. Sharpe Jr., B. Yuan, R. Vaidyanathan, R.L. Edwards, Measurements of young’s modulus, poisson’s ratio, and tensile strength of polysilicon, in Proceedings of the 10th Annual International Workshop on Micro Electro Mechanical Systems, Nagoya, Japan, (1997), pp. 424–429Google Scholar
  9. 9.
    R.K. Gupta, P.M. Osterberg, S.D. Senturia, Material property measurements of micromechanical polysilicon beams. Proc. SPIE 2880, 39 (1996)CrossRefGoogle Scholar
  10. 10.
    S. Jayaraman, R.L. Edwards, K.J. Hemke, Relating mechanical testing and microstructural features of polysilicon thin films. J. Mater. Res. 14, 688–697 (1999)CrossRefGoogle Scholar
  11. 11.
    A.L. Hartzell, M.G. da Silva, H.R. Shea, MEMS Reliability (Springer, New York, 2011)CrossRefGoogle Scholar
  12. 12.
    S. Senturia, Microsystems Design (Springer, New York, 2001)Google Scholar

Copyright information

© Springer Nature Switzerland AG 2020

Authors and Affiliations

  • Michael Huff
    • 1
  1. 1.Corporation for National Research InitiativesMEMS & Nanotechnology ExchangeRestonUSA

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