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International Conference on Emerging Internetworking, Data & Web Technologies

EIDWT 2020: Advances in Internet, Data and Web Technologies pp 342–350Cite as

Design of a DSL for Converting Rust Programming Language into RTL

Part of the Lecture Notes on Data Engineering and Communications Technologies book series (LNDECT,volume 47)

Abstract

Recent research has focused on a large amount of processing such as streaming processing, big data, deep learning and so on. Since the processing time of these processes increases in proportion to the amount of calculation, an arithmetic unit that can increase the speed is required. In this situation, Field Programmable Gate Array (FPGA) has been attracting attention because it can speed up processing and reduce power consumption. However, Hardware Description Language (HDL) such as Verilog used when developing FPGA increases the development time, but also makes it difficult to guarantee memory safety. In this paper, we propose a Register Transfer Level (RTL) designing Domain Specific Language (DSL) for Rust programming language convert to RTL.

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Author information

Authors and Affiliations

  1. Graduate School of Engineering, Okayama University of Science, 1-1 Ridai-cho, Kita-ku, Okayama-shi, Okayama, Japan

    Keisuke Takano

  2. Faculty of Engineering, Okayama University of Science, 1-1 Ridai-cho, Kita-ku, Okayama-shi, Okayama, Japan

    Tetsuya Oda & Masaki Kohata

Authors
  1. Keisuke Takano
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  2. Tetsuya Oda
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  3. Masaki Kohata
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Corresponding author

Correspondence to Keisuke Takano .

Editor information

Editors and Affiliations

  1. Department of Information and Communication Engineering, Fukuoka Institute of Technology, Fukuoka, Japan

    Prof. Dr. Leonard Barolli

  2. Innovation Center for Educational Resources, University Library, Kyushu University, Fukuoka, Japan

    Prof. Dr. Yoshihiro Okada

  3. Department of Electrical Engineering and Information Technology, University of Naples "Frederico II", Naples, Italy

    Prof. Dr. Flora Amato

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Takano, K., Oda, T., Kohata, M. (2020). Design of a DSL for Converting Rust Programming Language into RTL. In: Barolli, L., Okada, Y., Amato, F. (eds) Advances in Internet, Data and Web Technologies. EIDWT 2020. Lecture Notes on Data Engineering and Communications Technologies, vol 47. Springer, Cham. https://doi.org/10.1007/978-3-030-39746-3_36

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