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RTN and Its Intrinsic Interaction with Statistical Variability Sources in Advanced Nano-Scale Devices: A Simulation Study

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Noise in Nanoscale Semiconductor Devices

Abstract

Random telegraph noise (RTN) has been long debated in many theoretical and experimental studies. Its detrimental effect on the reliability of semiconductor devices is well documented. In particular its effect is exasperated in advanced nano-scale devices. In this book chapter, we navigate through some of the important effects of RTN in advanced MOS devices in detail. The amplitude of RTN fluctuation (in terms of current and threshold voltage) associated with the trapping of electrons in defect states at the Si/SiO2 interface and inside the gate oxide is investigated via numerical simulation. The intrinsic interplay between the RTN trap and random discrete dopants and their combined effect on the threshold voltage shift and the capture and emission time constants is discussed. Additionally, the limitations to the accuracy of spectroscopic analyses of RTN are examined based on the fluctuation of time constants in the presence of statistical variability effects. In this study three device architectures (conventional bulk MOSFET, fully depleted silicon-on-insulator MOSFET (FDSOI), and 14 nm FinFET) have been used as test vehicles representative of advanced MOS technologies.

We thank S.M. Amoroso for his insightful comments and constructive discussions, which greatly improved the manuscript.

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References

  1. S. Natarajan et al., A 14 nm logic technology featuring 2nd-generation FinFET air-gapped interconnects self-aligned double patterning and a 0.0588 μm2 SRAM cell size, in International Electron Devices Meeting Technical Digests IEDM, San Francisco (2014), pp. 71–73

    Google Scholar 

  2. C. Auth, et al., A 10nm high performance and low-power CMOS technology featuring 3rd generation FinFET transistors, self-aligned quad patterning, contact over active gate and cobalt local interconnects, in International Electron Devices Meeting Technical Digests IEDM, San Francisco (2017), pp. 674–676

    Google Scholar 

  3. K.K. Hung, P.K. Ko, C. Hu, Y.C. Cheng, Random telegraph noise of deep-submicrometer MOSFET’s. IEEE Electron Device Lett. 11, 90–92 (1990)

    Article  Google Scholar 

  4. Z. Shi, J.-P. Mieville, M. Dutoit, Random telegraph signals in deep submicron n-MOSFET’s. IEEE Trans. Electron Devices 41, 1161–1168 (1994)

    Article  Google Scholar 

  5. S.T. Martin, G.P. Li, E. Worley, J. White, The gate bias and geometry dependence of random telegraph signal amplitudes. IEEE Electron Device Lett. 18, 444–446 (1997)

    Article  Google Scholar 

  6. A. Avellan, W. Krautschneider, S. Schwantes, Observation and modeling of random telegraph signals in the gate and drain currents of tunnelling metal-oxide-semiconductor field-effect transistors, Appl. Phys. Lett. 78, 2790–2792 (2001)

    Article  Google Scholar 

  7. H.M. Bu, Y. Shi, X.L. Yuan, Y.D. Zheng, S.H. Gu, H. Majima, H. Ishicuro, T. Hiramoto, Impact of the device scaling on the low frequency noise in n-MOSFET’s, Appl. Phys. A 71, 133–136 (2000)

    Google Scholar 

  8. M.J. Kirton, M.J. Uren, Noise in solid state microstructures A new perspective on individual defects, interface states and low frequency (1/f) noise. Adv. Phys. 38, 367–468 (1989)

    Article  Google Scholar 

  9. P.J. Restle, J.W. Park, B.F. Lloyd, DRAM variable retention time, in International Electron Devices Meeting Technical Digests IEDM (1992), pp. 807–810

    Google Scholar 

  10. A. Asenov, R. Balasubramaniam, A.R. Brown, J.H. Davies, Effect of single-electron interface trapping in decanano MOSFETs: A. 3D atomistic simulation study. Superlatt. Microstruct. 27, 411–416 (2000)

    Google Scholar 

  11. K. Hess, A. Haggag, W. McMahon, B. Fischer, K. Cheng, J. Lee, J. Lyding, Simulation of Si-SiO defects generation in CMOS chips: from atomistic structure to chip failure rates, in International Electron Devices Meeting Technical Digests IEDM (2000), pp. 93–96

    Google Scholar 

  12. A. Avellan, D. Schroeder, W. Krautschneider, Modeling random telegraph signals in the gate current of metal-oxide-semiconductor field effect transistors after oxide breakdown. J. Appl. Phys. 94, 703 (2003)

    Article  Google Scholar 

  13. K. Kandiah, M.O. Deighton, F.B. Whiting, A physical model for random telegraph signal currents in semiconductor devices. J. Appl. Phys. 66, 937 (1989)

    Article  Google Scholar 

  14. Z. Celik-Butler, P. Vasina, N.V. Amarasinghe, A method for locating the position of oxide traps responsible for random telegraph signals in submicron MOSFET’s. IEEE Trans. Electron Devices, 47(3) (2000)

    Google Scholar 

  15. M.-H. Tsai, T.-P. Ma, The impact of device scaling on the current fluctuations in MOSFET’s. IEEE Trans. Electron Devices 41, 2061–2068 (1994)

    Article  Google Scholar 

  16. K.S. Ralls, W.J. Skocpol, L.D. Jackel, R.E. Howard, L.A. Fetter, R.W. Epworth, D.M. Tennant, Discrete resistance switching in submicron silicon inversion layers: individual interface traps and low frequency (1/f) noise. Phys. Rev. Lett. 52, 228–231 (1984)

    Article  Google Scholar 

  17. E. Simoen, B. Dierick, C.L. Claeys, G.J. Declerck, Explaining the amplitude of RTS noise in submicrometer MOSFET’s. IEEE Trans. Electron Devices 39, 422–429 (1992)

    Article  Google Scholar 

  18. H.H. Mueller, M. Schulz, Random telegraph signal: an atomic probe of the local current in field-effect transistors. J. Appl. Phys. 83, 1734–1741 (1998)

    Article  Google Scholar 

  19. A. Asenov, R. Balasubramaniam, A.R. Brown, J.H. Davies, S. Saini, Random telegraph signal amplitudes in sub 100 nm (Decanano) MOSFETs: A 3D ‘Atomistic’ simulation study, in International Electron Devices Meeting 2000. Technical Digests IEDM (2000), pp. 279–282

    Google Scholar 

  20. A. Asenov, Random dopant induced threshold voltage lowering and fluctuations in sub 0.1 micron MOSFETs: a 3-D “atomistic” simulation study. Trans. Electron Devices 45, 2505–2513 (1998)

    Google Scholar 

  21. S.M. Amoroso, L.Gerrer, F.Adamu-Lema, S. Markov, A. Asenov, Statistical study of bias temperature instability by means of 3D ‘Atomistic’ simulation, in ed. by T. Grasser, Bias Temperature Instability for Device and Circuits (Springer, New York, 2014)

    Google Scholar 

  22. A. Mauri, N. Castellani, C. Monzio Compagnoni, A. Ghetti, P. Cappelletti, A.S. Spinelli, A.L. Lacaita, Impact of atomistic doping and 3D electrostatics on the variability of RTN time constants in Flash memories, in Proceedings of IEEE 2011 International Electron Devices Meeting IEDM (2011), pp. 405–408

    Google Scholar 

  23. F. Adamu-LemaAccuracy, C.M. Compagnoni, S.M. Amoroso, N. Castell, L. Gerrer, S. Markov, A.S. Spinelli, A.L. Lacaita, A. Asenov, Issues of the spectroscopic analysis of RTN traps in nanoscale MOSFETs. IEEE Trans. Electron Devices 60(2), 833–839 (2012)

    Article  Google Scholar 

  24. F. Adamu-Lema, X. Wang, S.M. Amoroso, C. Riddet, B. Cheng, L. Shifren, R. Aitken, S. Sinha, G. Yeric, A. Asenov, Performance and variability of doped multi-threshold FinFETs for 10nm CMOS. IEEE Trans. Electron Devices 61(10), 3372–3378 (2014)

    Article  Google Scholar 

  25. G. Roy, A. Brown, F. Adamu-Lema, S. Roy, A. Asenov, Simulation study of individual and combined sources of intrinsic parameter fluctuations in conventional nano-MOSFETs. IEEE Trans. Electron Devices 53, 3063 (2006)

    Article  Google Scholar 

  26. S. Amoroso, A. Maconi, A. Mauri, C.M. Compagnoni, A.S. Spinelli, A.L. Lacaita, Three-dimensional simulation of charge-trap memory programming-part I: average behavior. IEEE Trans. Electron Devices 58, 1864 (2011)

    Article  Google Scholar 

  27. A. Asenov, A.R. Brown, J.H. Davies, S. Kaya, G. Slavcheva, Simulation of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs. IEEE Trans. Electron Devices 50(9), 1837–1852 (2003)

    Article  Google Scholar 

  28. A. Brown, J. Watling, A. Asenov, Intrinsic parameter fluctuations due to random grain orientations in high-k gate stacks. J. Comput. Electron. 5(4), 333–336 (2006)

    Article  Google Scholar 

  29. A.R. Brown, N.M. Idris, J.R. Watling, A. Asenov, Impact of metal gate granularity on threshold voltage variability: a full-scale three-dimensional statistical simulation study. IEEE Electron Device Lett. 31(11), 1199–1201 (2010)

    Google Scholar 

  30. H. Dadgour, K. Endo, V. De, K. Banerjee, Modeling and analysis of grain-orientation effects in emerging metal-gate devices and implications for SRAM reliability, in Proceedings of 2008 IEEE International Electron Devices Meeting IEDM (2008), pp. 705–708

    Google Scholar 

  31. A. Lannes, E. Anterrieu, K. Bouyoucef, Fourier interpolation and reconstruction via Shannon-type techniques. J. Modern Opt. 41(8), 1537–1574 (1994)

    Article  MathSciNet  Google Scholar 

  32. A. Lannes, E. Anterrieu, K. Bouyoucef, Fourier interpolation and reconstruction via Shannon-type techniques II. Technical developments and applications. J. Modern Opt. 43(1), 105–138 (1996)

    MATH  Google Scholar 

  33. S. Kaya, A.R. Brown, A. Asenov, D. Magot, T. Linton, Analysis of statistical fluctuation due to line edge roughness in sub-0.1μm MOSFETs, in Simulation of Semiconductor Processes and Devices 2001: SISPAD 01 (2001), pp 78–81

    Google Scholar 

  34. D. Reid, C. Millar, S. Roy, A. Asenov, Understanding LER-induced MOSFET VT variability: part I: three-dimensional simulation of large statistical samples. IEEE Trans. Electron Devices 57(11), 2801–2807 (2010)

    Article  Google Scholar 

  35. A. Ghetti, C.M. Compagnoni, A. Spinelli, A. Visconti, Comprehensive analysis of random telegraph noise instability and its scaling in deca-nanometer flash. IEEE Trans. Electron Devices 56, 1746 (2009)

    Article  Google Scholar 

  36. T. Grasser, H. Reisinger, W. Goes, T. Aichinger, P. Hehenberger, P.-J. Wagner, M. Nelhiebel, J. Franco, B. Kaczer, Switching oxide traps as the missing link between negative bias temperature instability and random telegraph noise, in 2009 IEEE International Electron Devices Meeting Technical Digests IEDM (2009), pp. 729–732

    Google Scholar 

  37. T. Grasser, H. Reisinger, P.-J. Wagner, F. Schanovsky, W. Goes, B. Kaczer, The time dependent defect spectroscopy (TDDS) for the characterization of the bias temperature instability, in 2010 IEEE International Reliability Physics Symposium (2010), pp. 16–25

    Google Scholar 

  38. A. Palma, A. Godoy, J.A. Jimenez-Tejada, J.E. Carceller, J.A. Lopez-Villanueva, Quantum two-dimensional calculation of time constants of random telegraph signals in metal-oxide-semiconductor structures. Phys. Rev. B 56, 9565–9574 (1997)

    Article  Google Scholar 

  39. W., Shockley, W. Read, Statistics of recombination of holes and electrons. Phys. Rev. 87, 835 (1952)

    Google Scholar 

  40. S.M. Amoroso, L. Gerrer, A. Asenov, 3D TCAD statistical analysis of transient charging in BTI degradation of nanoscale MOSFETs, in 2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2013), pp. 5–6

    Google Scholar 

  41. K. Takeuchi, T. Tatsumi, A. Furukawa, channel engineering for the reduction of random-dopant-placement-induced threshold voltage fluctuation, in International Electron Devices Meeting Technical Digests IEDM (1997), pp. 841–844

    Google Scholar 

  42. U. Kovac, C. Alexander, G. Roy, C. Riddet, B. Cheng, A. Asenov, Hierarchical simulation of statistical variability: from 3-D MC with ‘ab initio’ ionized impurity scattering to statistical compact models. IEEE Trans. Electron Devices 57(10), 2418–2426 (2010)

    Article  Google Scholar 

  43. K. Nishiohara, N. Shiguo, T. Wada, Effects of mesoscopic fluctuations in dopant distributions on MOSFET threshold voltage. IEEE Trans. Electron Devices 39, 634–639 (1992)

    Article  Google Scholar 

  44. P.A. Stolk, D.B.M. Klaasen, The effect of statistical dopant fluctuations on MOS device performance, in 1996 IEEE International Electron Devices Meeting. Technical Digest IEDM (1996)

    Google Scholar 

  45. T. Fischer, E. Amirante, K. Hofmann, M. Ostermayr, P. Huber, D. Schmitt-Landsiedel, A 65 nm test structure for the analysis of NBTI induced statistical variation in SRAM transistors, in Proceedings of ESSDERC 2008-38th European Solid-State Device Research Conference, Edinburgh (2008), pp. 51–5

    Google Scholar 

  46. H.-S. Wong, Y. Taur, Three-dimensional ‘atomistic’ simulation of discrete random dopant distribution effects in sub-0.1 μm MOSFET’s, in Proceedings of IEEE International Electron Devices Meeting Technical Digests IEDM (1993), pp. 705–708

    Google Scholar 

  47. A. Asenov, S. Kaya, A.R. Brown, Intrinsic parameter fluctuations in decananometer MOSFETs introduced by gate line edge roughness. IEEE Trans. Electron Devices 50(5), 1254–1260 (2003)

    Article  Google Scholar 

  48. C. Monzio Compagnoni, N. Castellani, A. Mauri, A.S. Spinelli, A.L. Lacaita, 3-Dimensional electrostatics- and atomistic doping induced variability of RTN time constants in nanoscale MOS devices-Part II: Spectroscopic implications. IEEE Trans. Electron Devices 59(9), 2495–2500 (2012)

    Article  Google Scholar 

  49. N. Castellani, C. Monzio Compagnoni, A. Mauri, A.S. Spinelli, A.L. Lacaita, 3-Dimensional electrostatics- and atomistic doping induced variability of RTN time constants in nanoscale MOS devices-part I: physical investigation. IEEE Trans. Electron Devices 59(9), 2488–2494 (2012)

    Article  Google Scholar 

  50. G. Bersuker, RTN analysis for defect identification in advanced gate stacks, in Proceedings of 2013 IEEE International Reliability Physics Symposium IRPS, Anaheim (2011), IRPS Tutorial No. 113

    Google Scholar 

  51. N. Zanolla, D. Siprak, P. Baumgartner, E. Sangiorgi, C. Fiegna, Measurement and simulation of gate voltage dependence of RTS emission and capture time constants in MOSFETs, in Proceedings of 2008 9th International Conference on Ultimate Integration of Silicon ULIS, 2008, pp. 137–140.

    Google Scholar 

  52. J. P. Campbell, J. Qin, K.P. Cheung, L.C. Yu, J.S. Suehle, A. Oates, K. Sheng, Random telegraph noise in highly scaled nMOSFETs, in Proceedings of 2009 IEEE International Reliability Physics Symposium IRPS (2009), pp. 382–388

    Google Scholar 

  53. T. Grasser, K.Rott, H. Reisinger, M. Waltl, J. Franco, B. Kaczer, A unified perspective of RTN and BTI, in Proceedings of 2014 IEEE International Reliability Physics Symposium (IRPS), Waikoloa (2014)

    Google Scholar 

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Author information

Authors and Affiliations

  1. University of Glasgow, Glasgow, UK

    F. Adamu-Lema, O. Badami, V. Georgiev & A. Asenov

  2. Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy

    C. Monzio Compagnoni

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  1. F. Adamu-Lema
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  2. C. Monzio Compagnoni
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  3. O. Badami
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  4. V. Georgiev
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  5. A. Asenov
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Correspondence to F. Adamu-Lema .

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Editors and Affiliations

  1. Institute for Microelectronics, Technische Universität Wien, Wien, Austria

    Tibor Grasser

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Adamu-Lema, F., Compagnoni, C.M., Badami, O., Georgiev, V., Asenov, A. (2020). RTN and Its Intrinsic Interaction with Statistical Variability Sources in Advanced Nano-Scale Devices: A Simulation Study. In: Grasser, T. (eds) Noise in Nanoscale Semiconductor Devices. Springer, Cham. https://doi.org/10.1007/978-3-030-37500-3_13

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  • DOI: https://doi.org/10.1007/978-3-030-37500-3_13

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