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Emerging Hardware Technologies for IoT Data Processing

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Intelligent Internet of Things

Abstract

Fast and energy-efficient data processing has become a critical need for various forms of computing in the era of Internet of things (IoT). Emerging IoT applications demand for increasingly high data collection rates and significant computational requirements that often do not fit in the stringent power envelopes of the existing IoT devices. Data centers and cloud servers are then used to empower the IoT systems by performing massive data processing on behalf of the IoT users. Recent years have witnessed many significant challenges for big data processing in IoT systems. This section provides an overview of main architectural challenges for data processing in IoT systems and explains a number of recent innovations for addressing the challenges. The rest of the section examines two example memory architectures for accelerating data-intensive applications in the IoT nodes and data centers. The first architecture is a memory subsystem based on the emerging nonvolatile memory technologies that enables energy-efficient neural network acceleration in memory arrays. The memory system is capable of performing ordinary data storage in the future IoT nodes, as well as significantly accelerating certain operations for binary neural network workloads. The second architecture is a memory-centric accelerator specifically designed to perform large-scale data clustering using the k-median algorithm. The accelerator is suitable for IoT data centers, where large data is collected from the IoT nodes and clustered in the cloud servers. The architecture has shown significant energy-efficiency and performance potentials for gene expression analysis from the healthcare sector and document clustering used for data mining in web applications.

No man has a good enough memory to be a successful liar.

Abraham Lincoln

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References

  1. G. Bello-Orgaz, J.J. Jung, D. Camacho, Social big data: recent achievements and new challenges. Inf. Fusion 28, 45–59 (2016)

    Article  Google Scholar 

  2. E. Ahmed, I. Yaqoob, I.A.T. Hashem, I. Khan, A.I.A. Ahmed, M. Imran, A.V. Vasilakos, The role of big data analytics in Internet of Things. Comput. Netw. 129, 459–471 (2017)

    Article  Google Scholar 

  3. A. Al-Fuqaha, M. Guizani, M. Mohammadi, M. Aledhari, M. Ayyash, Internet of things: a survey on enabling technologies, protocols, and applications, in IEEE Communications Surveys & Tutorials, 2015

    Google Scholar 

  4. N. Koshizuka, K. Sakamura, Ubiquitous ID: Standards for Ubiquitous computing and the Internet of Things, in IEEE Pervasive Comput., 2010

    Google Scholar 

  5. N. Kushalnagar, G. Montenegro, C. Schumacher, Pv6 over Low-Power Wireless Personal Area Networks (6LoWPANs): overview, assumptions, problem statement, and goals, in Internet Eng. Task Force (IETF), 2007

    Google Scholar 

  6. M. Kheirkhahan, S. Nair, A. Davoudi, P. Rashidi, A. Wanigatunga, D. Corbett, T. Mendoza, T. Manini, S. Ranka, A smartwatch-based framework for real-time and online assessment and mobility monitoring. J. Biomed. Informatics 89, 29–40 (2019)

    Article  Google Scholar 

  7. P. Barnaghi, W. Wang, C. Henson, K. Taylor, Early progress and back to the future, in International Journal on Semantic Web and Information Systems (IJSWIS), 2012

    Google Scholar 

  8. G. Kestor, R. Gioiosa, D.J. Kerbyson, A. Hoisie, Quantifying the energy cost of data movement in scientific applications, in IEEE International Symposium on Workload Characterization (IISWC), 2013

    Google Scholar 

  9. D. Pandiyan, C.-J. Wu, Quantifying the energy cost of data movement for emerging smart phone workloads on mobile platforms, in IEEE International Symposium on Workload Characterization (IISWC), 2014

    Google Scholar 

  10. N. Chatterjee, M. O’Connor, D. Lee, D.R. Johnson, S.W. Keckler, M. Rhu, W.J. Dally, Architecting an energy-efficient DRAM system for GPUs, in IEEE International Symposium on High Performance Computer Architecture (HPCA), 2017.

    Google Scholar 

  11. “The top ten exascale research challenges,” Report of the Advanced Scientific Computing Advisory Committee Subcommittee, 2014.

    Google Scholar 

  12. I. Akturk, U.R. Karpuzcu, Amnesiac: Amnesic automatic computer, in Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017

    Google Scholar 

  13. R. Balasubramonian, J. Chang, T. Manning, J.H. Moreno, R. Murphy, R. Nair, S. Swanson, Near-data processing: insights from a micro-46 workshop. IEEE Micro 2, 36–42 (2014)

    Article  Google Scholar 

  14. K. Lim, J. Chang, T. Mudge, P. Ranganathan, S.K. Reinhardt, T.F. Wenisch, Disaggregated memory for expansion and sharing in blade servers, in International Symposium on Computer Architecture, 2009

    Google Scholar 

  15. Y. Chen, T. Luo, S. Liu, S. Zhang, L. He, J. Wang, L. Li, T. Chen, Z. Xu, N. Sun, Dadiannao: a machine-learning supercomputer, in Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

    Google Scholar 

  16. J.C. Beyler, et al., ESODYP: an entirely software and dynamic data prefetcher based on a Markov model, in 12th Workshop on Compilers for Parallel Computers, 2006

    Google Scholar 

  17. X. Yu, C.J. Hughes, N. Satish, S. Devadas, IMP: indirect memory prefetcher, in Proceedings of the 48th International Symposium on Microarchitecture, 2015

    Google Scholar 

  18. J. Jeddeloh, B. Keeth, Hybrid memory cube new DRAM architecture increases density and performance, in Symposium on VLSI Technology (VLSIT), 2012.

    Google Scholar 

  19. J. Kim, J.S. Pak, J. Cho, E. Song, J. Cho, H. Kim, T. Song, J. Lee, H. Lee, K. Park, et al., High-frequency scalable electrical model and analysis of a through silicon via (TSV). IEEE Trans. Compon. Packag. Manuf. Technol. 1(2), 181–195 (2011)

    Article  Google Scholar 

  20. R. Hameed, W. Qadeer, M. Wachs, O. Azizi, A. Solomatnikov, B.C. Lee, S. Richardson, C. Kozyrakis, M. Horowitz, Understanding sources of inefficiency in general-purpose chips. ACM SIGARCH Comput. Archit. News 38(3), 37–47 (2010)

    Article  Google Scholar 

  21. D.H. Woo, N.H. Seong, D.L. Lewis, H.-H.S. Lee, An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth, in 16th International Symposium on High Performance Computer Architecture (HPCA), 2010

    Google Scholar 

  22. P. Mike, An Intro to MCDRAM (High Bandwidth Memory) on Knights Landing, Intel HPC Developer Conference, 2016

    Google Scholar 

  23. J. Ahn, S. Yoo, O. Mutlu, K. Choi, PIM-enabled instructions: a low-overhead, locality-aware processing-in-memory architecture, in ACM/IEEE 42nd Annual International Symposium on Computer Architecture (ISCA), 2015

    Article  Google Scholar 

  24. D. Kim, J. Kung, S. Chai, S. Yalamanchili, S. Mukhopadhyay, Neurocube: a programmable digital neuromorphic architecture with high-density 3D memory, in ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA), 2016

    Google Scholar 

  25. K. Hsieh, E. Ebrahimi, G. Kim, N. Chatterjee, M. O’Connor, N. Vijaykumar, O. Mutlu, S.W. Keckler, Transparent offloading and mapping (TOM): enabling programmer-transparent near-data processing in GPU systems. ACM SIGARCH Comput. Archit. News 44(3) (2016)

    Article  Google Scholar 

  26. M.N. Bojnordi, F. Nasrullah, ReTagger: an efficient controller for DRAM cache architectures, in Design Automation Conference (DAC), Las Vegas, NV, 2019

    Google Scholar 

  27. F. Pan, S. Gao, C. Chen, C. Song, F. Zeng, Recent progress in resistive random access memories: materials, switching mechanisms, and performance. Mater. Sci. Eng.: R: Rep. 83, 1–59 (2014)

    Article  Google Scholar 

  28. C. Ho, C.-L. Hsu, C.-C. Chen, J.-T. Liu, C.-S. Wu, C.-C. Huang, C. Hu, F.-L. Yang, 9nm half-pitch functional resistive memory cell with <1μa programming current using thermally oxidized sub-stoichiometric wo x film, in in Electron Devices Meeting (IEDM), 2010

    Google Scholar 

  29. B. Govoreanu, G. Kar, Y. Chen, V. Paraschiv, S. Kubicek, A. Fantini, I. Radu, L. Goux, S. Clima, R. Degraeve et al., 10 × 10 nm 2 hf/hfo x crossbar resistive RAM with excellent performance, in Electron Devices Meeting (IEDM), 2011

    Google Scholar 

  30. A.C. Torrezan, J.P. Strachan, G. Medeiros-Ribeiro, R.S. Williams, Sub-nanosecond switching of a tantalum oxide memristor. Nanotechnology 22(48), 485203 (2011)

    Article  Google Scholar 

  31. B.J. Choi, A.C. Torrezan, K.J. Norris, F. Miao, J.P. Strachan, M.-X. Zhang, D.A. Ohlberg, N.P. Kobayashi, J.J. Yang, R.S. Williams, Electrical performance and scalability of pt dispersed SiO2 nanometallic resistance switch. Nano Lett. 13(7), 3213–3217 (2013)

    Article  Google Scholar 

  32. S. Lai. Current status of the phase change memory and its future, in In Electron Devices Meeting, 2003

    Google Scholar 

  33. C. Cheng, C. Tsai, A. Chin, F. Yeh, High performance ultra-low energy RRAM with good retention and endurance, in In Electron Devices Meeting (IEDM), 2010

    Google Scholar 

  34. C. Cheng, A. Chin, F. Yeh, Novel ultra-low power RRAM with good endurance and retention, in In VLSI Technology (VLSIT), 2010

    Google Scholar 

  35. H. Akinaga, H. Shima, Resistive random access memory (RERAM) based on metal oxides, in Proceedings of the IEEE, 2010

    Google Scholar 

  36. S. Sheu, M. Chang, K. Lin, C. Wu, Y. Chen, P. Chiu, C. Kuo, Y. Yang, P. Chiang, W. Lin, C. Lin, A 4Mb embedded SLC resistive-RAM macro with 7.2 ns read-write random-access time and 160ns MLC-access capability, in IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011

    Google Scholar 

  37. M. Zangeneh, A. Joshi, Design and optimization of nonvolatile multibit 1T1R resistive RAM, in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014

    Google Scholar 

  38. J.J. Yang, M.D. Pickett, X. Li, D.A.A. Ohlberg, D.R. Stewart, R.S. Williams, Memristive switching mechanism for metal/oxide/metal nanodevices. Nat. Nanotechnol. 3, 429–433 (2008)

    Article  Google Scholar 

  39. D. Niu, C. Xu, N. Muralimanohar, N. Jouppi, Y. Xie, Design trade-offs for high density cross-point resistive memory, in ACM/IEEE International Symposium on Low Power Electronics and Design, 2012

    Google Scholar 

  40. C. Xu, X. Dong, N. Jouppi, Y. Xie, Design implications of memristor-based RRAM cross-point structures, in In Proceedings of the Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011

    Google Scholar 

  41. M. Zidan, H. Fahmy, M. Hussain, K. Salama, Memristor-based memory: the sneak paths problem and solutions. Microelectron. J. 44(2), 176–183 (2013)

    Article  Google Scholar 

  42. Y. Taigman, M. Yang, M. Ranzato, L. Wolf, DeepFace: closing the gap to human-level performance in face verification, in In Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition (CVPR), 2014

    Google Scholar 

  43. A. Krizhevsky, I. Sutskever, G.E. Hinton, ImageNet classification with deep convolutional neural networks, in Advances In Neural Information Processing Systems, 2012

    Google Scholar 

  44. X. Lei, A.W. Senior, A. Gruenstein, J. Sorensen, Accurate and compact large vocabulary speech recognition on mobile devices, in Interspeech, 2013

    Google Scholar 

  45. M. Motamedi, D. Fong, S. Ghiasi, Fast and energy-efficient CNN inference on IoT devices, arXiv preprint arXiv:1611.07151, 2016

    Google Scholar 

  46. L. Oskouei, S.G.H. Salar, M. Hashemi, S. Ghiasi, Cnndroid: Gpu-accelerated execution of trained deep convolutional neural networks on android, in Proceedings of the ACM on Multimedia Conference, 2016

    Google Scholar 

  47. S. Mehta, J. Torrellas, WearCore: a core for wearable workloads?, in International Conference on Parallel Architecture and Compilation Techniques (PACT), 2016

    Google Scholar 

  48. K. Ma, X. Li, K. Swaminathan, Y. Zheng, S. Li, Y. Liu, Y. Xie, J.J. Sampson, V. Narayanan, Nonvolatile processor architectures: Efficient, reliable progress with unstable power. IEEE Micro 36(3), 72–83 (2016)

    Article  Google Scholar 

  49. Y. LeCun, B. Boser, J. Denker, D. Henderson, R. Howard, W. Hubbard, L. Jackel, Backpropagation applied to handwritten zip code recognition. Neural Comput. 1, 541–551 (1989)

    Article  Google Scholar 

  50. S. Han, X. Liu, H. Mao, J. Pu, A. Pedram, M. Horowitz, W. Dally, EIE: efficient inference engine on compressed deep neural network, in Proceedings of the 43rd International Symposium on Computer Architecture (ISCA), 2016

    Google Scholar 

  51. E. Denton, W. Zaremba, J. Bruna, Y. LeCun, R. Fergus, Exploiting linear structure within convolutional networks for efficient evaluation, in In Advances in Neural Information Processing Systems; Curran Associates, Inc., 2014

    Google Scholar 

  52. C. Zhang, P. Li, G. Sun, Y. Guan, B. Xiao, J. Cong, Optimizing FPGA-based accelerator design for deep convolutional neural networks, in In Proceedings of the ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

    Google Scholar 

  53. F. Iandola, S. Han, M. Moskewicz, K. Ashraf, W. Dally, K. Keutzer, SqueezeNet: AlexNet-level accuracy with 50× fewer parameters and <0.5 MB model size, in arXiv:1602.07360, 2016

    Google Scholar 

  54. W. Chen, J. Wilson, S. Tyree, K. Weinberger, Y. Chen, Compressing neural networks with the Hashing Trick, in In Proceedings of the ICML, 2015

    Google Scholar 

  55. T. Chen, Z. Du, N. Sun, J. Wang, C. Wu, Y. Chen, O.D. Temam, Diannao: a small-footprint high-throughput accelerator for ubiquitous machine-learning, in In ACM Sigplan Notices, 2014

    Google Scholar 

  56. Y. Chen, J. Emer, V. Sze, Eyeriss: a spatial architecture for energy-efficient dataflow for convolutional neural networks, in In Proceedings of 43rd the ACM/IEEE Annual International Symposium on Computer Architecture (ISCA), 2016

    Google Scholar 

  57. Z. Du, R. Fasthuber, T. Chen, P. Ienne, L. Li, T. Luo, X. Feng, Y. Chen, O. S. Temam, ShiDianNao: shifting vision processing closer to the sensor, in In ACM SIGARCH Computer Architecture News, 2015

    Article  Google Scholar 

  58. R. Kozma, R.E. Pino, G.E. Pazienza, Advances in Neuromorphic Memristor Science and Applications (Springer Publishing Company, 2012)

    Google Scholar 

  59. A.M. Sheri, A. Rafique, W. Pedrycz, M. Jeon, Contrastive divergence for memristor-based restricted Boltzmann machine. Eng. Appl. Artif. Intell. 37, 336–342 (2015)

    Article  Google Scholar 

  60. M. Prezioso, F. Merrikh-Bayat, B. Hoskins, G. Adam, K.K. Likharev, D.B. Strukov, Training and operation of an integrated 12 neuromorphic network based on metal-oxide memristors. Nature 521(7550), 61–64 (2015)

    Article  Google Scholar 

  61. M.N. Bojnordi, E. Ipek, Memristive Boltzmann machine: a hardware accelerator for combinatorial optimization and deep learning, in IEEE International Symposium on High Performance Computer Architecture (HPCA), (IEEE, Barcelona, 2016)

    Google Scholar 

  62. A. Shafiee, A. Nag, N. Muralimanohar, R. Balasubramonian, J.P. Strachan, M. Hu, R.S. Williams, V. Srikumar, ISAAC: a convolutional neural network accelerator with in-situ analog arithmetic in crossbars. ACM SIGARCH Comput. Archit. News 44(3), 14–26 (2016)

    Article  MathSciNet  Google Scholar 

  63. P. Chi, S. Li, C. Xu, T. Zhang, J. Zhao, Y. Liu, Y. Wang, Y. Xie, Prime: a novel processing-in-memory architecture for neural network computation in RERAM-based main memory, in In Proceedings of the 43rd International Symposium on Computer Architecture, 2016

    Google Scholar 

  64. M. Gao, Q. Wang, M.T. Arafin, Y. Lyu, G. Qu, Approximate computing for low power and security in the internet of things. Computer 50(6), 27–34 (2017)

    Article  Google Scholar 

  65. Z. Wen, P. Bhatotia, R. Chen, M. Lee and others, ApproxIoT: approximate analytics for edge computing, in 38th International Conference on Distributed Computing Systems (ICDCS), 2018

    Google Scholar 

  66. D. Liu, C. Yang, S. Li, X. Chen, J. Ren, R. Liu, M. Duan, Y. Tan, L. Liang, FitCNN: a cloud-assisted and low-cost framework for updating CNNs on IoT devices. Futur. Gener. Comput. Syst. 91, 277–289 (2019)

    Article  Google Scholar 

  67. S. Tajasob, M. Rezaalipour, M. Dehyadegari, M.N. Bojnordi, Designing efficient imprecise adders using multi-bit approximate building blocks, in Proceedings of the International Symposium on Low Power Electronics and Design, 2018

    Google Scholar 

  68. R. Venkatesan, A. Agarwal, K. Roy, A. Raghunathan, MACACO: modeling and analysis of circuits for approximate computing, in Proceedings of the International Conference on Computer-Aided Design, 2011

    Google Scholar 

  69. A. Ranjan, S. Venkataramani, X. Fong, K. Roy, A. Raghunathan, Approximate storage for energy efficient spintronic memories, in In Proc. DAC, 2015

    Google Scholar 

  70. D. Mohapatra, V. Chippa, A. Raghunathan, K. Roy, Design of voltage-scalable meta-functions for approximate computing, in In Proc. DATE, 2011

    Google Scholar 

  71. A. Sampson, W. Dietl, E. Fortuna, D. Gnanapragasam, L. Ceze, D. Grossman, EnerJ: approximate data types for safe and general low-power computation, in in Proc. Int. Conf. Programm. Lang. Design Implement, 2011

    Google Scholar 

  72. H. Esmaeilzadeh, A. Sampson, L. Ceze, D. Burger, Neural acceleration for general-purpose approximate programs, in In Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

    Google Scholar 

  73. J. Bornholt, T. Mytkowicz, K. McKinley, Uncertain<T>: a first-order type for uncertain data, in ACM SIGARCH Computer Architecture News, 2014

    Google Scholar 

  74. M. Samadi, J. Lee, D. Jamshidi, A. Hormati, S. Mahlke, Sage: self-tuning approximation for graphics engines, in Annual IEEE/ACM International Symposium on Microarchitecture, 2013

    Google Scholar 

  75. W. Baek, T.M. Chilimbi, Green: a framework for supporting energy-conscious programming using controlled approximation, in in Proc. ACM SIGPLAN Conf. Programm. Lang. Design Implement, 2010

    Article  Google Scholar 

  76. E. Denton, W. Zaremba, J. Bruna, Y. LeCun, R. Fergus, Exploiting linear structure within convolutional networks for efficient evaluation, in In Advances in Neural Information Processing Systems, 2014

    Google Scholar 

  77. S. Han, J. Pool, J. Tran, W. Dally, Learning both weights and connections for efficient neural network, in In Advances in Neural Information Processing Systems; Curran Associates, Inc., 2015

    Google Scholar 

  78. S. Han, H. Mao, W. Dally, Deep compression: compressing deep neural networks with pruning, trained quantization and Huffman coding, in arXiv:1510.00149, 2015

    Google Scholar 

  79. Y. Gong, L. Liu, M. Yang, L. Bourdev, Compressing deep convolutional networks using vector quantization, in arXiv:1412.6115, 2014

    Google Scholar 

  80. I. Hubara, M. Courbariaux, D. Soudry, R. El-Yaniv, Y. Bengio, Binarized neural networks, in In Advances in Neural Information Processing Systems, 2016

    Google Scholar 

  81. M. Rastegari, V. Ordonez, J. Redmon, A. Farhadi, XNOR-Net: ImageNet classification using binary convolutional neural networks, in arXiv:1603.05279, 2016

    Chapter  Google Scholar 

  82. T. Tang, L. Xia, B. Li, Y. Wang, H. Yang, Binary convolutional neural network on RRAM, in In Proceedings of the 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 2017

    Google Scholar 

  83. J. Qiu, J. Wang, S. Yao, K. Guo, B. Li, E. Zhou, J. Yu, T. Tang, N. Xu, S. Song, et al, Going deeper with embedded FPGA platform for convolutional neural network, in In Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

    Google Scholar 

  84. R. Balasubramonian, J. Chang, T. Manning, J.H. Manning, R. Murphy, R. Nair, S. Swanson, Near-data processing: insights from a MICRO-46 workshop, in IEEE Micro, 2014

    Google Scholar 

  85. M. Alian, S. Min, H. Asgharimoghaddam, A. Dhar, D. Wang, T. Roewer, A. McPadden, O. O’Halloran, D. Chen, J. Xiong, D. Kim, Application-transparent near-memory processing architecture with memory channel network," in Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2018

    Google Scholar 

  86. A. Nag, R. Balasubramonian, V. Srikumar, R. Walker, A. Shafiee, J. Strachan, N. Muralimanohar, Newton: gravitating towards the physical limits of crossbar acceleration," in IEEE Micro, 2018

    Google Scholar 

  87. Q. Guo, X. Guo, R.I.E. Patel, E.G. Friedman, Ac-DIMM: associative computing with STT-MRAM, in ACM SIGARCH Computer Architecture News, 2013

    Google Scholar 

  88. J. Su, J. Liu, D.B. Thomas, P.Y. Cheung, Neural network based reinforcement learning acceleration on FPGA platforms, in ACM SIGARCH Computer Architecture News, 2017

    Article  Google Scholar 

  89. Y. Zhu, Y.P.Y. Zhang, Large-scale restricted Boltzmann machines on single GPU, in IEEE International Conference on Big Data, 2013

    Google Scholar 

  90. S. Li, D. Niu, K. Malladi, H. Zheng, B. Brennan, Y. Xie, Drisa: a dram-based reconfigurable in-situ accelerator, in Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

    Google Scholar 

  91. Q. Guo, X. Guo, Y. Bai, E. Ipek, A resistive TCAM accelerator for data-intensive computing, in In Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture, 2011

    Google Scholar 

  92. A. Pal Chowdhury, P. Kulkarni, M. Nazm Bojnordi, MB-CNN: memristive binary convolutional neural networks for embedded mobile devices. J. Low Power Electron. Appl. 8(38), 1–27 (2018)

    Article  Google Scholar 

  93. Y. Karthik Rupesh, P. Behnam, G. Reddy Pandla, M. Miryala, M. Bojnordi, Accelerating k-medians clustering using a novel 4t-4r RRAM cell, in IEEE Trans-actions on Very Large Scale Integration (VLSI) Systems, 2018

    Google Scholar 

  94. Y. Li, S. Lee, K. Oowada, H. Nguyen, Q. Nguyen, N. Mokhlesi, C. Hsu, J. Li, V. Ramachandra, T. Kamei, et al, 128Gb 3b/Cell NAND flash memory in 19nm technology with 18MB/s write rate and 400Mb/s toggle mode, in In Proceedings of the 2012 IEEE International on Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012

    Google Scholar 

  95. D. Takashima, Y. Nagadomi, T. Ozaki, A 100 MHz ladder FeRAM design with capacitance-coupled-bitline (CCB) cell, in IEEE J. Solid-State Circuits, 2011

    Google Scholar 

  96. R. Simpson, M. Krbal, P. Fons, A. Kolobov, J. Tominaga, T. Uruga, H. Tanida, Toward the ultimate limit of phase change in Ge2Sb2Te5. Nano Lett. 10(2), 414–419 (2010)

    Article  Google Scholar 

  97. A. Benoist, S. Blonkowski, S. Jeannot, S. Denorme, J. Damiens, J. Berger, P. Candelier, E. Vianello, H. Grampeix, J. Nodin, et al, 28 nm advanced CMOS resistive RAM solution as embedded non-volatile memory, in In Proceedings of the 2014 IEEE International Reliability Physics Symposium, 2014

    Google Scholar 

  98. M. Ueki, K. Akeuchi, T. Yamamoto, A. Tanabe, N. Ikarashi, M. Saitoh, T. Nagumo, H. Sunamura, M. Narihiro, K. Uejima, et al, Low-power embedded ReRAM technology for IoT applications, in In Proceedings of the 2015 Symposium on VLSI Circuits (VLSI Circuits), 2015

    Google Scholar 

  99. M. Oskin, F.T. Chong, T. Sherwood, Active pages: a computation model for intelligent memory, in in Proc. 25th Annu. Int. Symp. Comput. Archit., 1998

    Google Scholar 

  100. M. Qureshi, M. Franceschini, L. Lastras-Montaño, J. Karidis, Morphable memory system: a robust architecture for exploiting multi-level phase change memories, in In ACM SIGARCH Computer Architecture News, 2010

    Article  Google Scholar 

  101. B. Razavi, Principles of Data Conversion System Design. (Wiley-IEEE Press, 1995)

    Google Scholar 

  102. W. Kester, I. Analog Devices, Data Conversion Handbook (Analog Devices, Norwood, MA, 2005)

    Google Scholar 

  103. A. Vattani, The hardness of k-means clustering in the plane, in [Online]. Available: http://cseweb.ucsd.edu/avattani/papers/kmeans_hardness.pdf, (2009)

  104. A.K. Jain, R.C. Dubes, Algorithms for clustering data, (Prentice-Hall, Upper Saddle River, 1988)

    Google Scholar 

  105. Y. Lu, J. Han, Cancer classification using gene expression data. Inf. Syst. 28(4), 243–268 (2003)

    Article  Google Scholar 

  106. P.G. Anick, S. Vaithyanathan, Exploiting clustering and phrases for context-based information retrieval, in ACM SIGIR Forum, 1997

    Article  Google Scholar 

  107. I. Micron Technology, 8Gb DDR3 SDRAM, in [Online]. Available: http://www.micron.com//get-document/documentId=416 , 2009

  108. C.H. Cheng, A. Chin, F.S. Yeh, Novel ultra-low power RRAM with good endurance and retention, in in Proceedings Symp. VLSI Technol., 2010

    Google Scholar 

  109. P. Mertins et al., Proteogenomics connects somatic mutations to signalling in breast cancer. Nature 534(7605), 55–62 (2016)

    Article  Google Scholar 

  110. J. Torres-Sospedra, et al., UjiindoorLoc: a new multi-building and multi-floor database for Wlan fingerprint-based indoor localization problems, in Int. Conf. Indoor Positioning Indoor Navigat (IPIN), 2014

    Google Scholar 

  111. M. Lichman, UCI Machine Learning Repository, in [Online]. Available: http://archive.ics.uci.edu/ml , 2013

  112. ITRS, International Technology Roadmap for Semiconductors, in 2013 Edition. Accessed: Nov. 22, 2017. [Online]. Available: http://www.itrs.net/Links/2013ITRS/Home2013.html , 2013

  113. P.J. Crawley, G.W. Roberts, High-swing MOS current mirror with arbitrarily high output resistance, in Electron. Lett., 1992

    Google Scholar 

  114. R.L. Geiger, P.E. Allen, N.R. Strader, VLSI design techniques for analog and digital circuits vol 90 (McGraw-Hill, New York, 1990)

    Google Scholar 

  115. H.-S. Philip Wong, H.-Y. Lee, S. Yu, Y.-S. Chen, Y. Wu, P.-S. Chen, B. Lee, F.T. Chen, M.-J. Tsai, Metal–oxide RRAM, in Proceedings of the IEEE, 2012

    Google Scholar 

  116. P. Behnam, A. Pal Chowdhury, M. Nazm Bojnordi, R-cache: a highly set-associative in-package cache using memristive arrays, 2018

    Google Scholar 

  117. P.E. Danielsson, Getting the median faster. Comput. Graphics Image Process. 17(1), 71–78 (1981)

    Article  Google Scholar 

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Authors and Affiliations

  1. University of Utah, Salt Lake City, UT, USA

    Mahdi Nazm Bojnordi & Payman Behnam

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  1. Mahdi Nazm Bojnordi
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  2. Payman Behnam
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Correspondence to Mahdi Nazm Bojnordi .

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  1. Department of ECE, Duke University, Durham, NC, USA

    Farshad Firouzi

  2. Department of ECE, Duke University, Durham, NC, USA

    Krishnendu Chakrabarty

  3. Radyalis LLC, Austin, TX, USA

    Sani Nassif

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Bojnordi, M.N., Behnam, P. (2020). Emerging Hardware Technologies for IoT Data Processing. In: Firouzi, F., Chakrabarty, K., Nassif, S. (eds) Intelligent Internet of Things. Springer, Cham. https://doi.org/10.1007/978-3-030-30367-9_9

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  • DOI: https://doi.org/10.1007/978-3-030-30367-9_9

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