Experimental Evaluation of Probabilistic Execution-Time Modeling and Analysis Methods for SDF Applications on MPSoCs

  • Ralf StemmerEmail author
  • Hai-Dang Vu
  • Kim Grüttner
  • Sebastien Le Nours
  • Wolfgang Nebel
  • Sebastien Pillement
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 11733)


Early validation of software running on multi-processor platforms is fundamental to guarantee that real-time constraints will be fully met. In the domain of timing analysis probabilistic simulation techniques tackle the problem of scalability. However, creation of probabilistic SystemC models remains a difficult task and is not well supported for multi-processors systems. In this paper we present a modeling workflow that will then be used for an experimental evaluation of probabilistic simulation techniques. For the modeling process a measurement-based approach is proposed to favor the creation of trustful models. The evaluated probabilistic simulation techniques demonstrate good potential to deliver fast yet accurate estimations for multi-processor systems.


Statistical Model Checking Probabilistic SystemC model Multi processor 


  1. 1.
    Association, I.S., et al.: IEEE Standard for Standard Systemc Language Reference Manual. IEEE Computer Society, New York (2012)Google Scholar
  2. 2.
    Basu, A., et al.: Rigorous component-based system design using the bip framework. IEEE Softw. 28(3), 41–48 (2011). Scholar
  3. 3.
    Cazorla, F.J., et al.: Proxima: improving measurement-based timing analysis through randomisation and probabilistic analysis. In: 2016 Euromicro Conference on Digital System Design (DSD), pp. 276–285. IEEE (2016)Google Scholar
  4. 4.
    Cazorla, F.J., et al.: PROARTIS: probabilistically analyzable real-time systems. ACM Trans. Embed. Comput. Syst. (TECS) 12(2s), 94 (2013)Google Scholar
  5. 5.
    David, A., et al.: Statistical model checking for networks of priced timed automata. In: Fahrenberg, U., Tripakis, S. (eds.) FORMATS 2011. LNCS, vol. 6919, pp. 80–96. Springer, Heidelberg (2011). Scholar
  6. 6.
  7. 7.
    Jegourel, C., Legay, A., Sedwards, S.: A platform for high performance statistical model checking - plasma. In: Flanagan, C., König, B. (eds.) TACAS 2012. Lecture Notes in Computer Science, vol. 7214, pp. 498–503. Springer, Heidelberg (2012)CrossRefGoogle Scholar
  8. 8.
    Kumar, A.: Analysis, design and management of multimedia multi-processor systems. Ph.D. thesis, Eindhoven University of Technology (2009)Google Scholar
  9. 9.
    Kwiatkowska, M., Norman, G., Parker, D.: PRISM 4.0: verification of probabilistic real-time systems. In: Gopalakrishnan, G., Qadeer, S. (eds.) CAV 2011. LNCS, vol. 6806, pp. 585–591. Springer, Heidelberg (2011). Scholar
  10. 10.
    Lee, E.A., Messerschmitt, D.G.: Synchronous data flow. Proc. IEEE 75(9), 1235–1245 (1987)CrossRefGoogle Scholar
  11. 11.
    Legay, A., Delahaye, B., Bensalem, S.: Statistical model checking: an overview. In: Barringer, H., et al. (eds.) RV 2010. LNCS, vol. 6418, pp. 122–135. Springer, Heidelberg (2010). CrossRefGoogle Scholar
  12. 12.
    Ngo, V.C., Legay, A., Quilbeuf, J.: Statistical model checking for SystemC models. In: 2016 IEEE 17th International Symposium on High Assurance Systems Engineering, pp. 197–204 (2016)Google Scholar
  13. 13.
    Nouri, A., Bozga, M., Moinos, A., Legay, A., Bensalem, S.: Building faithful high-level models and performance evaluation of Manycore embedded systems. In: ACM/IEEE International Conference on Formal Methods and Models for Codesign (2014)Google Scholar
  14. 14.
    Nouri, A., Bensalem, S., Bozga, M., Delahaye, B., Jegourel, C., Legay, A.: Statistical model checking QoS properties of systems with SBIP. Int. J. Softw. Tools Technol. Transfer 17(2), 171–185 (2014)CrossRefGoogle Scholar
  15. 15.
    Schlaak, C., Fakih, M., Stemmer, R.: Power and execution time measurement methodology for SDF applications on FPGA-based MPSoCs. arXiv preprint arXiv:1701.03709 (2017)
  16. 16.
    Stemmer, R., Schlender, H., Fakih, M., Grüttner, K., Nebel, W.: Probabilistic state-based RT-analysis of SDFGs on MPSoCs with shared memory communication. In: 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), March 2019Google Scholar

Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  • Ralf Stemmer
    • 1
    Email author
  • Hai-Dang Vu
    • 2
  • Kim Grüttner
    • 3
  • Sebastien Le Nours
    • 2
  • Wolfgang Nebel
    • 1
  • Sebastien Pillement
    • 2
  1. 1.University of OldenburgOldenburgGermany
  2. 2.University of Nantes, IETR, UMR CNRS 6164NantesFrance
  3. 3.OFFIS e.V.OldenburgGermany

Personalised recommendations