Abstract
The advance in processing technologies has driven the complexity of electronic design. The shrinkage of the transistor size makes the design models sophisticated, and thus the simulation time of those models is prolonged. This advance in technology is affecting dramatically the product design cycle. On the other hand, low power consumption is a fundamental target in Integrated Circuits (IC) industry. Power consumption should be addressed in early phases of the design process to prevent long expensive iterations. Different methodologies and modeling techniques have been developed to keep the design cycle short through different variants. Transaction-Level Modeling (TLM) is one of those modeling techniques. TLM is needed for power estimation to detect any unexpected excessive power dissipation in the design at early stages. In this chapter, book outline and contributions are presented.
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Darwish, A.B., El-Moursy, M.A., Dessouky, M.A. (2020). Introduction. In: Transaction-Level Power Modeling. Springer, Cham. https://doi.org/10.1007/978-3-030-24827-7_1
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DOI: https://doi.org/10.1007/978-3-030-24827-7_1
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