DVFS-Oriented Scenario Applications to Processor Architectures

  • Nikolaos ZombakisEmail author
  • Yahya H. Yassin
  • Michail Noltsis
  • Dimitrios Soudris
  • Per Gunnar Kjeldsberg
  • Francky Catthoor


The objective of the present chapter is to perform synergies among system scenario methodologies and processor mapping with emphasis on DVFS. First, we exploit the system scenario methodology and combine it with a DVFS-aware scheduler to ensure timing deadlines for both hard and soft real-time processor systems. Next, we have added a novel sleep mode extension on top of the DVFS configuration to further increase our energy gains. This has been demonstrated for an SAM4L processor platform. Later, we switched to the reliability-sensitive embedded systems domain, and performed a relevant case study of a PID controller pieced together with a simple system scenario methodology to actuate DVFS and manage dependability in a successful manner. The concept of a turbo, “gas-pedal” point is also discussed. Experiments in this case were performed on pure hardware, on the NXP IMX6Q board.


Dynamic voltage and frequency scaling Race-to-halt Sleep mode 


  1. 1.
  2. 2.
    Atmel: Sam4l xplained pro user guide. Atmel CorporationGoogle Scholar
  3. 3.
    M.A. Awan, S.M. Petters, Race-to-halt energy saving strategies. J. Syst. Archit. 60(10), 796–815 (2014)CrossRefGoogle Scholar
  4. 4.
    Communication, T., Security: Spectrum monitoring and homeland security. (2015)
  5. 5.
    S. Corbetta, W. Meeus, D. Rodopoulos, E. Cappe, F. Catthoor, A. Fritsch, System-wide reliability analysis on real processor and application under vdd and T stress, in SELSE Silicon Errors in Logic System Effects (2016)Google Scholar
  6. 6.
    S.V. Gheorghita, T. Basten, H. Corporaal, Intra-task scenario-aware voltage scheduling, in Proceedings of the 2005 International Conference on Compilers, Architectures and Synthesis for Embedded Systems (ACM, New York, 2005), pp. 177–184Google Scholar
  7. 7.
    S.V. Gheorghita, S. Stuijk, T. Basten, H. Corporaal, Automatic scenario detection for improved WCET estimation, in Proceedings of the 42nd Annual Design Automation Conference (ACM, New York, 2005), pp. 101–104Google Scholar
  8. 8.
    S.V. Gheorghita, T. Basten, H. Corporaal, Scenario selection and prediction for DVS-aware scheduling of multimedia applications. J. Signal Proces. Syst. 50(2), 137–161 (2008)CrossRefGoogle Scholar
  9. 9.
    C. Lee, M. Potkonjak, W.H. Mangione-Smith, MediaBench: a tool for evaluating and synthesizing multimedia and communications systems, in Proceedings of Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997 (IEEE, Piscataway, 1997), pp. 330–335Google Scholar
  10. 10.
    NXP: 6dual/6quad automotive and infotainment applications processors data sheet, document no. imx6dqaec 3/2014. Tech. rep. (2014)Google Scholar
  11. 11.
    D. Rodopoulos, F. Catthoor, D. Soudris, Tackling performance variability due to RAS mechanisms with PID-controlled DVFS. IEEE Comput. Archit. Lett. 14(2), 156–159 (2015)CrossRefGoogle Scholar
  12. 12.
    N. Semiconductors, 6dual/6quad applications processor reference manual. (2015). Rev 3
  13. 13.
    N. Zompakis, F. Catthoor, D. Soudris, Efficient configurations for dynamic applications in next generation mobile systems, ed. by A.D. Panagopoulos, in Handbook of Research on Next Generation Mobile Communication Systems (IGI Global, Oxford, 2015) Chap. 6, pp. 112–148Google Scholar

Copyright information

© Springer Nature Switzerland AG 2020

Authors and Affiliations

  • Nikolaos Zombakis
    • 1
    Email author
  • Yahya H. Yassin
    • 2
    • 3
  • Michail Noltsis
    • 1
    • 3
  • Dimitrios Soudris
    • 1
  • Per Gunnar Kjeldsberg
    • 2
  • Francky Catthoor
    • 4
  1. 1.National Technical University of AthensAthensGreece
  2. 2.Norwegian University of Science and Technology, NTNUTrondheimNorway
  3. 3.KU LeuvenLeuvenBelgium
  4. 4.IMEC and KU LeuvenLeuvenBelgium

Personalised recommendations