Abstract
In Chips 2020 Vol. II we presented a review of Monolithic 3D technologies. In Sect. 3.3, titled “Precision Bonders—A Game Changer for Monolithic 3D,” we covered the impact of the then recent breakthrough in bonding alignment on the ease of adapting monolithic 3D technology. Since then, the equipment vendors have made significant improvements in the precision of these bonders, making it a very attractive technology for Monolithic 3D integration. At Semicon West 2018, EVG announced improvement of their precision bonders GEMINI® FB XT from 200 to 50 nm alignment precision. Such precision can support most currently envisioned monolithic 3D applications.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsReferences
J.-E. Michallet, CoolCube™: more than a true 3D VLSI alternative to scaling, 3d incites, 27 Mar 2019
EV Group, EV Group accelerates 3D-IC packaging roadmap with breakthrough wafer bonding technology, Press release 3 Jul 2018
TEL, Wafer Bonder/Debonder Synapse™ Series. https://www.tel.com/product/synapse.html
Z. Or-Bach, Chips 2020 Vol. 2, chap. 3.3.2 (Springer, Switzerland, 2016)
WO 2018/071143, PCT application
Z. Or-Bach, A 1,000x improvement in computer systems by bridging the processor-memory gap, in 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (IEEE, 2017)
WO 2019/060798, PCT application publication
U. S. Patent 6,821,826
V. Suntharalingam et al., Megapixel CMOS image sensor fabricated in three-dimensional integrated circuit technology, in ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005 (IEEE, 2005)
U. S. Patent 6,521,041
Z. Or-Bach et al., Modified ELTRAN®—a game changer for Monolithic 3D, in 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (IEEE, 2015)
WO 2017/053329, PCT application
R. Merritt, The latest in NAND. EE Times, 9 Aug 2018
DocMemory, Yangtze Memory to quickly migrate from 64 layers to 128 layers on 3D NAND. Simmtester.com. 15 Nov 2018
L. Brunet et al., Breakthroughs in 3D Sequential technology, in 2018 IEEE International Electron Devices Meeting (IEDM) (IEEE, 2018)
A. Vandooren et al., First demonstration of 3D stacked FinFETs at a 45 nm fin pitch and 110 nm gate pitch technology on 300 mm wafers, in 2018 IEEE International Electron Devices Meeting (IEDM) (IEEE, 2018)
C.-C. Yang et al., Location-controlled-grain technique for Monolithic 3D BEOL FinFET circuits, in 2018 IEEE International Electron Devices Meeting (IEDM) (IEEE, 2018)
https://eps.ieee.org/technology/heterogeneous-integration-roadmap.html (2019)
GLOBALFOUNDRIES and Arm demonstrate high-density 3D stack test chip for high performance compute applications, Press release 07 Aug 2019
A. Patterson, TSMC, Arm show 3DIC made of chiplets. EE Times, 29 Sept 2019
Korczynski, Ed. Applied Materials releases selective etch tool, 13 (2016)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2020 Springer Nature Switzerland AG
About this chapter
Cite this chapter
Or-Bach, Z. (2020). Monolithic 3D Integration—An Update. In: Murmann, B., Hoefflinger, B. (eds) NANO-CHIPS 2030. The Frontiers Collection. Springer, Cham. https://doi.org/10.1007/978-3-030-18338-7_8
Download citation
DOI: https://doi.org/10.1007/978-3-030-18338-7_8
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-18337-0
Online ISBN: 978-3-030-18338-7
eBook Packages: Physics and AstronomyPhysics and Astronomy (R0)