The TaPaSCo Open-Source Toolflow for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems

  • Jens Korinth
  • Jaco Hofmann
  • Carsten Heinz
  • Andreas KochEmail author
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 11444)


In this paper we present TaPaSCo – the Task Parallel Systems Composer, an open-source, toolflow and software framework for automated construction of System-on-Chip FPGA designs for task parallel computation. TaPaSCo aims to increase the scalability and portability of FPGA designs by performing the construction of heterogeneous many-core architectures from custom processing elements, and providing a simple, uniform programming interface to utilize spatially parallel computation on FPGAs. A key feature of TaPaSCo’s is automated design space exploration, which can be performed in parallel on a computing cluster. This greatly simplifies scaling hardware designs, facilitating iterative growth and portability across FPGA devices and families.


FPGA Reconfigurable computing Design space exploration System-on-Chip design Design automation High-level synthesis Scalability Portability TaPaSCo Heterogeneous computing Parallel computing 


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© Springer Nature Switzerland AG 2019

Authors and Affiliations

  1. 1.Technical University of DarmstadtDarmstadtGermany

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