Abstract
We present a hardware implementation in reconfigurable logic of a single-pass connected component labelling (CCL) and connected component analysis (CCA) module. The design supports a video stream in 4 pixel per clock format (4 ppc) and allows real-time processing of 4K/UHD video stream (3840\(\,\times \,\)2160 pixels) at 60 frames per second. We discuss the applied modification and simplifications and their impact on the algorithm’s performance. We verified the proposed module in an exemplary application – skin colour areas segmentation – on the ZCU 102 evaluation board with Xilinx Zynq UltraScale+ MPSoC device.
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It should be noted that the blanking periods in the native format are much longer and the conversion to AXI Stream format “shortens” them. This is a result of the assumption that in AXI Stream only valid data is transferred.
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Acknowledgements
The work presented in this paper was supported by the National Science Centre project no. 2016/23/D/ST6/01389 entitled “The development of computing resources organization in latest generation of heterogeneous reconfigurable devices enabling real-time processing of UHD/4K video stream”.
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Ciarach, P., Kowalczyk, M., Przewlocka, D., Kryjak, T. (2019). Real-Time FPGA Implementation of Connected Component Labelling for a 4K Video Stream. In: Hochberger, C., Nelson, B., Koch, A., Woods, R., Diniz, P. (eds) Applied Reconfigurable Computing. ARC 2019. Lecture Notes in Computer Science(), vol 11444. Springer, Cham. https://doi.org/10.1007/978-3-030-17227-5_13
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