Real-Time FPGA Implementation of Connected Component Labelling for a 4K Video Stream
We present a hardware implementation in reconfigurable logic of a single-pass connected component labelling (CCL) and connected component analysis (CCA) module. The design supports a video stream in 4 pixel per clock format (4 ppc) and allows real-time processing of 4K/UHD video stream (3840\(\,\times \,\)2160 pixels) at 60 frames per second. We discuss the applied modification and simplifications and their impact on the algorithm’s performance. We verified the proposed module in an exemplary application – skin colour areas segmentation – on the ZCU 102 evaluation board with Xilinx Zynq UltraScale+ MPSoC device.
KeywordsFPGA Zynq UltraScale+ MPSoC 4K UHD Real-time video processing Connected Component Labelling (CCL) Connected Component Analysis (CCA)
The work presented in this paper was supported by the National Science Centre project no. 2016/23/D/ST6/01389 entitled “The development of computing resources organization in latest generation of heterogeneous reconfigurable devices enabling real-time processing of UHD/4K video stream”.
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