Abstract
The field of computer vision has been increasing over the past years as it is applied to many different applications nowadays. Additionally, they have become more complex and power demanding. On one hand, standards and libraries such as OpenCV and OpenVX have been proposed to ease development. On the other hand, FPGAs have proven to be energy efficient on image processing. The tendency over the last years has turned into using High-Level Synthesis (HLS), to ease their programmability. We present a highly optimized, parametrizable and streaming capable HLS open-source library for FPGAs called HiFlipVX. Due to its structure, it is straightforward to use and simple to add new functions. Furthermore, it is easily portable as it is based on the OpenVX standard. HiFlipVX also adds different features such as auto-vectorization. The library achieves an efficient resource utilization and a significant scalability, also in comparison to the reference (xfOpenCV), as shown in the evaluation.
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References
Kalb, T., Kalms, L., Göhringer, D., et al.: Tulipp: towards ubiquitous low-power image processing platforms. In: International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, pp. 306–311, July 2016
Bradski, G.: The openCV library. Dr. Dobb’s J. Softw. Tools 25, 120–125 (2000)
Giduthuri, R., Pulli, K.: OpenVX: a framework for accelerating computer vision. In: SIGGRAPH ASIA 2016 Courses, pp. 14:1–14:50 (2016)
Kalms, L., Göhringer, D.: Exploration of OpenCL for FPGAs using SDAccel and comparison to GPUs and multicore CPUs. In: 27th International Conference on Field Programmable Logic and Applications (FPL), pp. 1–4, September 2017
Winterstein, F., Bayliss, S., Constantinides, G.A.: High-level synthesis of dynamic data structures: a case study using vivado HLS. In: International Conference on Field-Programmable Technology (FPT), pp. 362–365, December 2013
Sekar, C., Hemasunder: Tutorial T7: Designing with Xilinx SDSoC. In: 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems (VLSID), pp. xl–xli, January 2017
Kalms, L., Podlubne, A., Göhringer, D.: Hiflipvx, February 2019. https://github.com/TUD-ADS/HiFlipVX
Oezkan, M.A., Reiche, O., Hannig, F., Teich, J.: A highly efficient and comprehensive image processing library for C++-based high-level synthesis. In: International Workshop on FPGAs for Software Programmers, pp. 1–10, September 2017
Ragan-Kelley, J., Barnes, C., Adams, A., Paris, S., Durand, F., Amarasinghe, S.: Halide: a language and compiler for optimizing parallelism, locality, and recomputation in image processing pipelines. SIGPLAN Not. 48(6), 519–530 (2013)
Pu, J., et al.: Programming heterogeneous systems from an image processing DSL. ACM Trans. Archit. Code Optim. 14(3), 26:1–26:25 (2017)
Membarth, R., Reiche, O., Hannig, F., Teich, J., Krner, M., Eckert, W.: HIPAcc: a domain-specific language and compiler for image processing. IEEE Trans. Parallel Distrib. Syst. 27(1), 210–224 (2016)
Reiche, O., Schmid, M., Hannig, F., et al.: Code generation from a domain-specific language for C-based HLS of hardware accelerators. In: International Conference on Hardware/Software Codesign and System Synthesis, pp. 1–10, October 2014
Giduthuri, R., The Khronos OpenVX Working Group: The OpenVX Specification 1.2.1. Khronos Group, August 2018
Palomares, J.M., Gonzalez, J., Ros, E., Prieto, A.: General logarithmic image processing convolution. IEEE Trans. Image Process. 15(11), 3602–3608 (2006)
Hematian, A., Chuprat, S., Manaf, A.A., Parsazadeh, N.: Zero-delay FPGA-based odd-even sorting network. In: IEEE Symposium on Computers Informatics (ISCI), pp. 128–131, April 2013
Knuth, D.E.: The Art of Computer Programming, Volume 3: (2nd Ed.) Sorting and Searching. Addison Wesley Longman Publishing Co., Inc, Boston (1998)
Aranda, L.A., Reviriego, P., Maestro, J.A.: A fault-tolerant implementation of the median filter. In: 16th European Conference on Radiation and Its Effects on Components and Systems (RADECS), pp. 1–4, September 2016
Podlubne, A., et al.: Low power image processing applications on FPGAs using dynamic voltage scaling and partial reconfiguration. In: Conference on Design and Architectures for Signal and Image Processing (DASIP), pp. 64–69, October 2018
Acknowledgment
This work has been partially supported by European Unions Horizon 2020 research and innovation programme as part of the TULIPP project under grant agreement No. 688403 and partially by the German Federal Ministry of Education and Research BMBF as part of the PARIS project under grant agreement number 16ES0657.
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Kalms, L., Podlubne, A., Göhringer, D. (2019). HiFlipVX: An Open Source High-Level Synthesis FPGA Library for Image Processing. In: Hochberger, C., Nelson, B., Koch, A., Woods, R., Diniz, P. (eds) Applied Reconfigurable Computing. ARC 2019. Lecture Notes in Computer Science(), vol 11444. Springer, Cham. https://doi.org/10.1007/978-3-030-17227-5_12
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