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i-Core: A Runtime-Reconfigurable Processor Platform for Cyber-Physical Systems

  • Marvin DamschenEmail author
  • Martin Rapp
  • Lars Bauer
  • Jörg HenkelEmail author
Chapter

Abstract

We provide an overview of i-Core (invasive Core), a processor platform with a runtime-reconfigurable instruction set. i-Core couples a general-purpose processor core with a reconfigurable fabric that enables the configuration of application-specific hardware accelerators at runtime. This way, i-Core can adapt its instruction set to choose a runtime trade-off between the resources allocated and the performance achieved for application-specific acceleration. The adaptivity of i-Core is leveraged to advance several research areas that are addressed in this chapter. First, we provide an overview of the i-Core architecture. Then, we summarize our research findings in the areas of task scheduling, reliability, and hard real-time as well as multi-core systems. The focus of this summary is on our recent findings in the context of worst-case execution time guarantees.

Notes

Acknowledgements

This work was partly supported by the German Research Foundation (DFG) as part of the Transregional Collaborative Research Center “Invasive Computing” (SFB/TR 89) and as part of the priority program “Dependable Embedded Systems” (SPP 1500). Parts of the research summarized in this chapter were conducted together with Dr. Artjom Grudnitsky and Dr. Hongyan Zhang who earned their PhDs under the supervision of Prof. Dr. Jörg Henkel in 2015 and 2017, respectively. We want to thank them for fruitful discussions.

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Copyright information

© Springer Nature Switzerland AG 2020

Authors and Affiliations

  1. 1.Karlsruhe Institute of TechnologyKarlsruheGermany

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