Abstract
This paper presents an implementation of Sobel edge detection in static images for the FPGA, described in Verilog, and for the respective software: Mathematica, MATLAB, OpenCV and in-house C++ written program. Comparisons in performance were made between the different applications. The results concluded that the FPGA was faster.
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Sato, T.N., Pedro Krupa, G., Zoccal, L.B. (2019). Performance Measurements of Sobel Edge Detection Implemented in an FPGA Architecture and Software. In: Iano, Y., Arthur, R., Saotome, O., Vieira Estrela, V., Loschi, H. (eds) Proceedings of the 4th Brazilian Technology Symposium (BTSym'18). BTSym 2018. Smart Innovation, Systems and Technologies, vol 140. Springer, Cham. https://doi.org/10.1007/978-3-030-16053-1_22
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