On Cloud-Supported Web-Based Integrated Development Environment for Programming DataFlow Architectures

  • Nenad KorolijaEmail author
  • Aleš Zamuda
Part of the Computer Communications and Networks book series (CCN)


Control-flow computer architectures are based on the von Neumann paradigm. They are flexible enough to support the execution of instructions in any order. Each instruction is fetched from the memory before it could be executed. Passing the data from the instruction that produces it to the instruction that requires it is done using registers or memory. DataFlow computer architectures are configured for execution of an algorithm, while data travel through the hardware. They are suitable for high-performance computing, where the same set of instructions should be run many times. Initialization of data and other processing is done by the processor based on control-flow. The Maxeler framework provides functionality for transforming any algorithm into a VHDL file, and further configuring the dataflow hardware. It also provides support for sending data from the control-flow host processor to the dataflow hardware, and bringing results back. Common programming languages are supported for the host processor, while dataflow hardware programming is done in MaxJ, which is an extended subset of the Java programming language. One can use an integrated development environment called MaxIDE, which is based on Eclipse. We present here a perspective overview of a cloud-supported web-based integrated development environment, WebIDE, which is a subset of MaxIDE, and enables users to develop and run programs for dataflow hardware even without owning dataflow hardware. The main concepts are explained, as well as differences in two integrated development environments. Then, our main focus is on the point of view of programmers, and the goal is to compare the MaxIDE and the WebIDE Maxeler framework, describing the technology needed to support the WebIDE Maxeler framework, providing that the MaxIDE already exists.


  1. 1.
    Milutinovic V (1996) Surviving the design of a 200MHz RISC microprocessor. IEEE Computer Society Press, Washington DCGoogle Scholar
  2. 2.
    Milutinovic V (ed) (1988) High-level language computer architecture. Computer Science Press, New YorkGoogle Scholar
  3. 3.
    Tartalja I, Milutinovic V (1997) The cache coherence problem in shared-memory multiprocessors: software solutions. IEEE Computer Society Press, Washington DCGoogle Scholar
  4. 4.
    Tomasevic M, Milutinovic V (1996) A simulation study of hardware-oriented DSM approaches. IEEE Parallel Distrib Technol 4(1)Google Scholar
  5. 5.
    Milutinovic V, Stenstrom P (1999) Special issue on distributed shared memory systems. Proc IEEE 87:399–404CrossRefGoogle Scholar
  6. 6.
    Milutinovic V, Hurson A (2015) Dataflow processing, 1st edn. Academic Press, Cambridge, pp 1–266Google Scholar
  7. 7.
    Feynman RP, Hey AJ, Allen RW (2000) Feynman lectures on computation. Perseus Books, New YorkGoogle Scholar
  8. 8.
    Milutinovic V (1985) Trading latency and performance: a new algorithm for adaptive equalization. IEEE Trans CommunGoogle Scholar
  9. 9.
    Milutinovic V, Splitting temporal and spatial computing: enabling a combinational dataflow in hardware. In: The ISCA ACM tutorial on advances in supercomputing, SantaGoogle Scholar
  10. 10.
    Flynn M, Mencer O, Milutinovic V, Rakocevic G, Stenstrom P, Valero M, Trobec R (2013) Moving from PetaFlops to PetaData. Communications of the ACM. Margherita Ligure, Italy, 1995, pp 39–43CrossRefGoogle Scholar
  11. 11.
    Trifunovic N, Milutinovic V, Salom J, Kos A (2015) Paradigm shift in big data supercomputing: dataflow vs. controlflow. J Big Data 2:4CrossRefGoogle Scholar
  12. 12.
    Hurson A, Milutinovic V (2015) Special issue on dataflow supercomputing. Advances in computers, vol 96Google Scholar
  13. 13.
    Milutinovic V, Salom J, Veljovic D, Korolija N, Markovic D, Petrovic L (2017) Maxeler AppGallery revisited. Dataflow supercomputing essentials. Springer, Cham, pp 3–18Google Scholar
  14. 14.
    Stojanović S, Bojić D, Bojović M (2015) An overview of selected heterogeneous and reconfigurable architectures. In: Hurson A, Milutinovic V (eds) Dataflow processing, vol 96. Advances in computers. Academic Press, Waltham, pp 1–45CrossRefGoogle Scholar
  15. 15.
    Kos A, Rankovic V, Tomazic S (2015) Sorting networks on Maxeler dataflow supercomputing systems. Adv Comput 96:139–186CrossRefGoogle Scholar
  16. 16.
    Meden R, Kos A (2017) Bitcoin mining using Maxeler dataflow computers. Electrotech Rev 84(5):253–258Google Scholar
  17. 17.
    Umek A, Kos A (2016) The role of high performance computing and communication for real-time biofeedback in sport. Math Probl EngGoogle Scholar
  18. 18.
    Kos A, Milutinović V, Umek A (2018) Challenges in wireless communication for connected sensors and wearable devices used in sport biofeedback applications. Future Gener Comput SystGoogle Scholar
  19. 19.
    Ranković V, Kos A, Tomaz S, Milutinovic V (2013) Performance of the bitonic mergesort network on a dataflow computer. In: 21st Telecommunications forum (TELFOR), 2013. IEEE, Belgrade, pp 849–852Google Scholar
  20. 20.
    Milutinovic V, Salom J, Veljovic D, Korolija N, Markovic D, Petrovic L (2017) Polynomial and rational functions. Dataflow supercomputing essentials. Springer, Cham, pp 69–105CrossRefGoogle Scholar
  21. 21.
    Korolija N, Milutinovic V, Milosevic S (2007) Accelerating conjugate gradient solver: temporal versus spatial data. In: The IPSI BgD transactions on advanced researchGoogle Scholar
  22. 22.
    Ngom A, Stojmenovic I, Milutinovic V (2001) STRIP-a strip-based neural-network growth algorithm for learning multiple-valued functions. IEEE Trans Neural Netw 12:212–227CrossRefGoogle Scholar
  23. 23.
    Milutinovic V (1989) Mapping of neural networks on the honeycomb architecture. Proc IEEE 77:1875–1878CrossRefGoogle Scholar
  24. 24.
    Trobec R, Jerebic I, Janežič D (1993) Parallel algorithm for molecular dynamics integration. Parallel Comput 19:1029–1039CrossRefGoogle Scholar
  25. 25.
    Korolija N, Djukic T, Milutinovic V, Filipovic N (2013) Accelerating Lattice-Boltzman method using Maxeler dataflow approach. Trans Int Res 9(2):5–10Google Scholar
  26. 26.
    Friston S, Steed A, Tilbury S, Gaydadjiev G (2016) Construction and evaluation of an ultra low latency frameless renderer for VR. IEEE Trans Vis Comput Graph 22(4):1377–1386CrossRefGoogle Scholar
  27. 27.
    Milutinović V, Salom J, Trifunovic N, Giorgi R (2015) Using the WebIDE. Guide to dataflow supercomputing. Computer communications and networks. Springer, ChamCrossRefGoogle Scholar
  28. 28.
    Huang K, Liu Y, Korolija N, Carulli J, Makris Y (2015) Recycled IC detection based on statistical methods. IEEE Trans Comput-Aided Des Int Circuits Syst 34(6):947–960CrossRefGoogle Scholar
  29. 29.
    Popovic J, Bojic D, Korolija N (2015) Analysis of task effort estimation accuracy based on use case point size. IET Softw 9(6):166–173CrossRefGoogle Scholar
  30. 30.
    Trifunovic N, Milutinovic V, Korolija N, Gaydadjiev G (2016) An AppGallery for dataflow computing. J Big Data 3(1):5CrossRefGoogle Scholar
  31. 31.
    Korolija N, Popović J, Cvetanović M, Bojović M (2017) Dataflow-based parallelization of control-flow algorithms. Creativity in computing and dataflow supercomputing, vol 104. Advances in computers. Print ISBN 9780128119556Google Scholar
  32. 32.
    Milutinovic V, Salom J, Veljovic D, Korolija N, Markovic D, Petrovic L (2017) Mini tutorial. Dataflow supercomputing essentials. Springer, Cham, pp 133–147CrossRefGoogle Scholar
  33. 33.
    Milutinovic V, Salom J, Veljovic D, Korolija N, Markovic D, Petrovic L (2017) Transforming applications from the control flow to the Dataflow paradigm. Dataflow supercomputing essentials. Springer, Cham, pp 107–129CrossRefGoogle Scholar
  34. 34.
    Milutinović V, Furht B, Obradović Z, Korolija N (2016) Advances in high performance computing and related issues. Math Probl EngGoogle Scholar
  35. 35.
    Kos A, Tomažič S, Salom J, Trifunovic N, Valero M, Milutinovic V (2015) New benchmarking methodology and programming model for big data processing. Int J Distrib Sens Netw 11:5CrossRefGoogle Scholar
  36. 36.
    Mencer O, Gaydadjiev G, Flynn M (2012) OpenSPL: the Maxeler programming model for programming in space. Maxeler Technologies, UKGoogle Scholar
  37. 37.
    Knezevic P, Radnovic B, Nikolic N, Jovanovic T, Milanov D, Nikolic M, Milutinovic V et al (2000) The architecture of the Obelix-an improved internet search engine. In: Proceedings of the 33rd annual Hawaii international conference on IEEE system sciences, Hawaii, p 7Google Scholar
  38. 38.
    Kovacevic M, Diligenti M, Gori M, Milutinovic V (2004) Visual adjacency multigraphs-a novel approach for a web page classification. In: Proceedings of SAWM04 workshopGoogle Scholar
  39. 39.
    Trifunovic N et al (2016) The MaxGallery project. Advances in computers, vol 104. Springer, BerlinGoogle Scholar

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© Springer Nature Switzerland AG 2019

Authors and Affiliations

  1. 1.School of Electrical EngineeringUniversity of BelgradeBelgradeSerbia
  2. 2.Faculty of Electrical Engineering and Computer Science (FERI)University of MariborMariborSlovenia

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