Analog-to-Digital Converters Employing Chaotic Internal Circuits to Maximize Resolution-Bandwidth Product - Turbo ADC

Abstract

By applying information theoretic concepts to analog-to-digital convertor (ADC) design, we have created a mathematical framework from which the fundamental limit for the resolution-bandwidth product of any ADC may be derived. We found the surprising result that the limiting resolution of any ADC is proportional to oversampling-ratio (OSR), as opposed to widely-held belief that the resolution is proportional to $log_2(OSR)$, a dramatic increase in the achievable resolution. This result, which resembles Shannon’s well-known result for the capacity of a communication channel, represents a paradigm shift in our understanding of data conversion methods and provides encouragement that new methods may be found. Furthermore, to achieve this theoretical limit, the internal analog modulator (or filter) of an ADC should be a chaotic system, so that both small as well as large changes in the input signal cause large (but bounded) deterministic changes at the output of the modulator - analogous to the “Butterfly effect”. This led us to discover a new class of ADCs, which we call TurboADC’s, that can trade off resolution for bandwidth on the fly, keeping their product equal to the fundamental information theoretic limit. These designs impose modest requirements on the analog front-end resources and power at the expense of greater complexity in the back-end decoder. A discrete-time TurboADC proposed here is a hybrid of a 1st order Delta-Sigma modulator and a Cyclic ADC, with the best features of both designs - oversampling, noise shaping, and simplicity from the Sigma-delta ADC approach and fast half-interval searching from Cyclic ADC’s. Simulations of the proposed TurboADC confirm our finding that the resolution of an ADC may approach fundamental limit of OSR bits within the baseband.