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Machine Learning for Compact Lithographic Process Models

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Machine Learning in VLSI Computer-Aided Design

Abstract

This chapter described the motivations and requirements for compact patterning models, and the role of machine learning in constructing them. We start by defining patterning process models and their role in the IC fabrication process. We then describe the requirements of these models, in particular with regard to turn-around time in production high-volume manufacturing, which usually necessitates the use of compact patterning process models rather than rigorous models. We describe the stages into which the pattern process can be subdivided, and the challenges of modeling each stage. We then move to the discussion of supervised learning as it has been applied to the problem of training compact patterning process models. In the final section, we review some of recent results in applying deep learning to this domain.

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Acknowledgements

Special thanks to Mike Rieger and John Stirniman for introducing me to this fascinating field.

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Authors and Affiliations

  1. Synopsys, Inc., Mountain View, CA, USA

    J. P. Shiely

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  1. J. P. Shiely
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Correspondence to J. P. Shiely .

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Editors and Affiliations

  1. Department of Electrical and Computer Engineering and Center for Cyber Physical Systems, Khalifa University, Abu Dhabi, United Arab Emirates

    Ibrahim (Abe) M. Elfadel

  2. Massachusetts Institute of Technology, Cambridge, MA, USA

    Duane S. Boning

  3. Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA

    Xin Li

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Shiely, J.P. (2019). Machine Learning for Compact Lithographic Process Models. In: Elfadel, I., Boning, D., Li, X. (eds) Machine Learning in VLSI Computer-Aided Design. Springer, Cham. https://doi.org/10.1007/978-3-030-04666-8_2

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  • DOI: https://doi.org/10.1007/978-3-030-04666-8_2

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-04665-1

  • Online ISBN: 978-3-030-04666-8

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